mirror of
https://gitlab.com/qemu-project/qemu
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Add missing files to KVM commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5629 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
eac3026225
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053304480a
3 changed files with 1080 additions and 0 deletions
374
kvm-all.c
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374
kvm-all.c
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@ -0,0 +1,374 @@
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/*
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* QEMU KVM support
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*
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* Copyright IBM, Corp. 2008
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*
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* Authors:
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* Anthony Liguori <aliguori@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#include <sys/types.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <linux/kvm.h>
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#include "qemu-common.h"
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#include "sysemu.h"
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#include "kvm.h"
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//#define DEBUG_KVM
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#ifdef DEBUG_KVM
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#define dprintf(fmt, ...) \
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do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
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#else
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#define dprintf(fmt, ...) \
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do { } while (0)
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#endif
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typedef struct kvm_userspace_memory_region KVMSlot;
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int kvm_allowed = 0;
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struct KVMState
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{
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KVMSlot slots[32];
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int fd;
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int vmfd;
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};
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static KVMState *kvm_state;
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static KVMSlot *kvm_alloc_slot(KVMState *s)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(s->slots); i++) {
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if (s->slots[i].memory_size == 0)
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return &s->slots[i];
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}
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return NULL;
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}
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static KVMSlot *kvm_lookup_slot(KVMState *s, target_phys_addr_t start_addr)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(s->slots); i++) {
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KVMSlot *mem = &s->slots[i];
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if (start_addr >= mem->guest_phys_addr &&
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start_addr < (mem->guest_phys_addr + mem->memory_size))
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return mem;
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}
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return NULL;
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}
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int kvm_init_vcpu(CPUState *env)
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{
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KVMState *s = kvm_state;
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long mmap_size;
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int ret;
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dprintf("kvm_init_vcpu\n");
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ret = kvm_vm_ioctl(s, KVM_CREATE_VCPU,
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(void *)(unsigned long)env->cpu_index);
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if (ret < 0) {
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dprintf("kvm_create_vcpu failed\n");
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goto err;
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}
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env->kvm_fd = ret;
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env->kvm_state = s;
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mmap_size = kvm_ioctl(s, KVM_GET_VCPU_MMAP_SIZE, 0);
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if (mmap_size < 0) {
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dprintf("KVM_GET_VCPU_MMAP_SIZE failed\n");
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goto err;
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}
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env->kvm_run = mmap(NULL, mmap_size, PROT_READ | PROT_WRITE, MAP_SHARED,
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env->kvm_fd, 0);
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if (env->kvm_run == MAP_FAILED) {
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ret = -errno;
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dprintf("mmap'ing vcpu state failed\n");
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goto err;
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}
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ret = kvm_arch_init_vcpu(env);
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err:
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return ret;
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}
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int kvm_init(int smp_cpus)
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{
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KVMState *s;
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int ret;
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int i;
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if (smp_cpus > 1)
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return -EINVAL;
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s = qemu_mallocz(sizeof(KVMState));
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if (s == NULL)
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return -ENOMEM;
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for (i = 0; i < ARRAY_SIZE(s->slots); i++)
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s->slots[i].slot = i;
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s->vmfd = -1;
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s->fd = open("/dev/kvm", O_RDWR);
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if (s->fd == -1) {
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fprintf(stderr, "Could not access KVM kernel module: %m\n");
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ret = -errno;
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goto err;
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}
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ret = kvm_ioctl(s, KVM_GET_API_VERSION, 0);
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if (ret < KVM_API_VERSION) {
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if (ret > 0)
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ret = -EINVAL;
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fprintf(stderr, "kvm version too old\n");
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goto err;
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}
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if (ret > KVM_API_VERSION) {
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ret = -EINVAL;
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fprintf(stderr, "kvm version not supported\n");
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goto err;
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}
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s->vmfd = kvm_ioctl(s, KVM_CREATE_VM, 0);
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if (s->vmfd < 0)
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goto err;
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/* initially, KVM allocated its own memory and we had to jump through
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* hooks to make phys_ram_base point to this. Modern versions of KVM
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* just use a user allocated buffer so we can use phys_ram_base
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* unmodified. Make sure we have a sufficiently modern version of KVM.
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*/
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ret = kvm_ioctl(s, KVM_CHECK_EXTENSION, (void *)KVM_CAP_USER_MEMORY);
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if (ret <= 0) {
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if (ret == 0)
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ret = -EINVAL;
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fprintf(stderr, "kvm does not support KVM_CAP_USER_MEMORY\n");
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goto err;
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}
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ret = kvm_arch_init(s, smp_cpus);
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if (ret < 0)
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goto err;
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kvm_state = s;
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return 0;
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err:
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if (s) {
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if (s->vmfd != -1)
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close(s->vmfd);
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if (s->fd != -1)
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close(s->fd);
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}
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qemu_free(s);
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return ret;
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}
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static int kvm_handle_io(CPUState *env, uint16_t port, void *data,
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int direction, int size, uint32_t count)
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{
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int i;
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uint8_t *ptr = data;
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for (i = 0; i < count; i++) {
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if (direction == KVM_EXIT_IO_IN) {
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switch (size) {
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case 1:
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stb_p(ptr, cpu_inb(env, port));
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break;
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case 2:
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stw_p(ptr, cpu_inw(env, port));
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break;
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case 4:
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stl_p(ptr, cpu_inl(env, port));
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break;
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}
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} else {
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switch (size) {
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case 1:
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cpu_outb(env, port, ldub_p(ptr));
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break;
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case 2:
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cpu_outw(env, port, lduw_p(ptr));
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break;
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case 4:
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cpu_outl(env, port, ldl_p(ptr));
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break;
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}
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}
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ptr += size;
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}
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return 1;
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}
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int kvm_cpu_exec(CPUState *env)
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{
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struct kvm_run *run = env->kvm_run;
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int ret;
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dprintf("kvm_cpu_exec()\n");
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do {
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kvm_arch_pre_run(env, run);
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if ((env->interrupt_request & CPU_INTERRUPT_EXIT)) {
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dprintf("interrupt exit requested\n");
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ret = 0;
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break;
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}
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ret = kvm_vcpu_ioctl(env, KVM_RUN, 0);
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kvm_arch_post_run(env, run);
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if (ret == -EINTR || ret == -EAGAIN) {
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dprintf("io window exit\n");
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ret = 0;
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break;
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}
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if (ret < 0) {
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dprintf("kvm run failed %s\n", strerror(-ret));
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abort();
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}
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ret = 0; /* exit loop */
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switch (run->exit_reason) {
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case KVM_EXIT_IO:
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dprintf("handle_io\n");
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ret = kvm_handle_io(env, run->io.port,
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(uint8_t *)run + run->io.data_offset,
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run->io.direction,
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run->io.size,
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run->io.count);
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break;
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case KVM_EXIT_MMIO:
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dprintf("handle_mmio\n");
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cpu_physical_memory_rw(run->mmio.phys_addr,
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run->mmio.data,
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run->mmio.len,
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run->mmio.is_write);
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ret = 1;
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break;
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case KVM_EXIT_IRQ_WINDOW_OPEN:
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dprintf("irq_window_open\n");
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break;
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case KVM_EXIT_SHUTDOWN:
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dprintf("shutdown\n");
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qemu_system_reset_request();
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ret = 1;
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break;
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case KVM_EXIT_UNKNOWN:
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dprintf("kvm_exit_unknown\n");
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break;
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case KVM_EXIT_FAIL_ENTRY:
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dprintf("kvm_exit_fail_entry\n");
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break;
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case KVM_EXIT_EXCEPTION:
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dprintf("kvm_exit_exception\n");
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break;
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case KVM_EXIT_DEBUG:
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dprintf("kvm_exit_debug\n");
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break;
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default:
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dprintf("kvm_arch_handle_exit\n");
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ret = kvm_arch_handle_exit(env, run);
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break;
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}
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} while (ret > 0);
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return ret;
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}
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void kvm_set_phys_mem(target_phys_addr_t start_addr,
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ram_addr_t size,
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ram_addr_t phys_offset)
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{
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KVMState *s = kvm_state;
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ram_addr_t flags = phys_offset & ~TARGET_PAGE_MASK;
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KVMSlot *mem;
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/* KVM does not support read-only slots */
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phys_offset &= ~IO_MEM_ROM;
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mem = kvm_lookup_slot(s, start_addr);
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if (mem) {
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if (flags == IO_MEM_UNASSIGNED) {
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mem->memory_size = 0;
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mem->guest_phys_addr = start_addr;
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mem->userspace_addr = 0;
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mem->flags = 0;
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kvm_vm_ioctl(s, KVM_SET_USER_MEMORY_REGION, mem);
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} else if (start_addr >= mem->guest_phys_addr &&
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(start_addr + size) <= (mem->guest_phys_addr + mem->memory_size))
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return;
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}
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/* KVM does not need to know about this memory */
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if (flags >= IO_MEM_UNASSIGNED)
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return;
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mem = kvm_alloc_slot(s);
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mem->memory_size = size;
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mem->guest_phys_addr = start_addr;
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mem->userspace_addr = (unsigned long)(phys_ram_base + phys_offset);
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mem->flags = 0;
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kvm_vm_ioctl(s, KVM_SET_USER_MEMORY_REGION, mem);
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/* FIXME deal with errors */
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}
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int kvm_ioctl(KVMState *s, int type, void *data)
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{
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int ret;
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ret = ioctl(s->fd, type, data);
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if (ret == -1)
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ret = -errno;
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return ret;
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}
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int kvm_vm_ioctl(KVMState *s, int type, void *data)
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{
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int ret;
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ret = ioctl(s->vmfd, type, data);
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if (ret == -1)
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ret = -errno;
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return ret;
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}
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int kvm_vcpu_ioctl(CPUState *env, int type, void *data)
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{
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int ret;
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ret = ioctl(env->kvm_fd, type, data);
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if (ret == -1)
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ret = -errno;
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return ret;
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}
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68
kvm.h
Normal file
68
kvm.h
Normal file
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@ -0,0 +1,68 @@
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/*
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* QEMU KVM support
|
||||
*
|
||||
* Copyright IBM, Corp. 2008
|
||||
*
|
||||
* Authors:
|
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* Anthony Liguori <aliguori@us.ibm.com>
|
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*
|
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
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* See the COPYING file in the top-level directory.
|
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*
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*/
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#ifndef QEMU_KVM_H
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#define QEMU_KVM_H
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#include "config.h"
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#ifdef CONFIG_KVM
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extern int kvm_allowed;
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#define kvm_enabled() (kvm_allowed)
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#else
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#define kvm_enabled() (0)
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#endif
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struct kvm_run;
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/* external API */
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int kvm_init(int smp_cpus);
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int kvm_init_vcpu(CPUState *env);
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int kvm_cpu_exec(CPUState *env);
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|
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void kvm_set_phys_mem(target_phys_addr_t start_addr,
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ram_addr_t size,
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ram_addr_t phys_offset);
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/* internal API */
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|
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struct KVMState;
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typedef struct KVMState KVMState;
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int kvm_ioctl(KVMState *s, int type, void *data);
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|
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int kvm_vm_ioctl(KVMState *s, int type, void *data);
|
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|
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int kvm_vcpu_ioctl(CPUState *env, int type, void *data);
|
||||
|
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/* Arch specific hooks */
|
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|
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int kvm_arch_post_run(CPUState *env, struct kvm_run *run);
|
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|
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int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run);
|
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|
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int kvm_arch_pre_run(CPUState *env, struct kvm_run *run);
|
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|
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int kvm_arch_get_registers(CPUState *env);
|
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|
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int kvm_arch_put_registers(CPUState *env);
|
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|
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int kvm_arch_init(KVMState *s, int smp_cpus);
|
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|
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int kvm_arch_init_vcpu(CPUState *env);
|
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|
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#endif
|
638
target-i386/kvm.c
Normal file
638
target-i386/kvm.c
Normal file
|
@ -0,0 +1,638 @@
|
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/*
|
||||
* QEMU KVM support
|
||||
*
|
||||
* Copyright (C) 2006-2008 Qumranet Technologies
|
||||
* Copyright IBM, Corp. 2008
|
||||
*
|
||||
* Authors:
|
||||
* Anthony Liguori <aliguori@us.ibm.com>
|
||||
*
|
||||
* This work is licensed under the terms of the GNU GPL, version 2 or later.
|
||||
* See the COPYING file in the top-level directory.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/mman.h>
|
||||
|
||||
#include <linux/kvm.h>
|
||||
|
||||
#include "qemu-common.h"
|
||||
#include "sysemu.h"
|
||||
#include "kvm.h"
|
||||
#include "cpu.h"
|
||||
|
||||
//#define DEBUG_KVM
|
||||
|
||||
#ifdef DEBUG_KVM
|
||||
#define dprintf(fmt, ...) \
|
||||
do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
|
||||
#else
|
||||
#define dprintf(fmt, ...) \
|
||||
do { } while (0)
|
||||
#endif
|
||||
|
||||
int kvm_arch_init_vcpu(CPUState *env)
|
||||
{
|
||||
struct {
|
||||
struct kvm_cpuid cpuid;
|
||||
struct kvm_cpuid_entry entries[100];
|
||||
} __attribute__((packed)) cpuid_data;
|
||||
int limit, i, cpuid_i;
|
||||
uint32_t eax, ebx, ecx, edx;
|
||||
|
||||
cpuid_i = 0;
|
||||
|
||||
cpu_x86_cpuid(env, 0, &eax, &ebx, &ecx, &edx);
|
||||
limit = eax;
|
||||
|
||||
for (i = 0; i <= limit; i++) {
|
||||
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
|
||||
|
||||
cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
|
||||
c->function = i;
|
||||
c->eax = eax;
|
||||
c->ebx = ebx;
|
||||
c->ecx = ecx;
|
||||
c->edx = edx;
|
||||
}
|
||||
|
||||
cpu_x86_cpuid(env, 0x80000000, &eax, &ebx, &ecx, &edx);
|
||||
limit = eax;
|
||||
|
||||
for (i = 0x80000000; i <= limit; i++) {
|
||||
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
|
||||
|
||||
cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
|
||||
c->function = i;
|
||||
c->eax = eax;
|
||||
c->ebx = ebx;
|
||||
c->ecx = ecx;
|
||||
c->edx = edx;
|
||||
}
|
||||
|
||||
cpuid_data.cpuid.nent = cpuid_i;
|
||||
|
||||
return kvm_vcpu_ioctl(env, KVM_SET_CPUID, &cpuid_data);
|
||||
}
|
||||
|
||||
static int kvm_has_msr_star(CPUState *env)
|
||||
{
|
||||
static int has_msr_star;
|
||||
int ret;
|
||||
|
||||
/* first time */
|
||||
if (has_msr_star == 0) {
|
||||
struct kvm_msr_list msr_list, *kvm_msr_list;
|
||||
|
||||
has_msr_star = -1;
|
||||
|
||||
/* Obtain MSR list from KVM. These are the MSRs that we must
|
||||
* save/restore */
|
||||
ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, &msr_list);
|
||||
if (ret < 0)
|
||||
return 0;
|
||||
|
||||
msr_list.nmsrs = 0;
|
||||
kvm_msr_list = qemu_mallocz(sizeof(msr_list) +
|
||||
msr_list.nmsrs * sizeof(msr_list.indices[0]));
|
||||
if (kvm_msr_list == NULL)
|
||||
return 0;
|
||||
|
||||
ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, kvm_msr_list);
|
||||
if (ret >= 0) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < kvm_msr_list->nmsrs; i++) {
|
||||
if (kvm_msr_list->indices[i] == MSR_STAR) {
|
||||
has_msr_star = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
free(kvm_msr_list);
|
||||
}
|
||||
|
||||
if (has_msr_star == 1)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_init(KVMState *s, int smp_cpus)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* create vm86 tss. KVM uses vm86 mode to emulate 16-bit code
|
||||
* directly. In order to use vm86 mode, a TSS is needed. Since this
|
||||
* must be part of guest physical memory, we need to allocate it. Older
|
||||
* versions of KVM just assumed that it would be at the end of physical
|
||||
* memory but that doesn't work with more than 4GB of memory. We simply
|
||||
* refuse to work with those older versions of KVM. */
|
||||
ret = kvm_ioctl(s, KVM_CHECK_EXTENSION, (void *)KVM_CAP_SET_TSS_ADDR);
|
||||
if (ret <= 0) {
|
||||
fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* this address is 3 pages before the bios, and the bios should present
|
||||
* as unavaible memory. FIXME, need to ensure the e820 map deals with
|
||||
* this?
|
||||
*/
|
||||
return kvm_vm_ioctl(s, KVM_SET_TSS_ADDR, (void *)0xfffbd000);
|
||||
}
|
||||
|
||||
static void set_v8086_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
|
||||
{
|
||||
lhs->selector = rhs->selector;
|
||||
lhs->base = rhs->base;
|
||||
lhs->limit = rhs->limit;
|
||||
lhs->type = 3;
|
||||
lhs->present = 1;
|
||||
lhs->dpl = 3;
|
||||
lhs->db = 0;
|
||||
lhs->s = 1;
|
||||
lhs->l = 0;
|
||||
lhs->g = 0;
|
||||
lhs->avl = 0;
|
||||
lhs->unusable = 0;
|
||||
}
|
||||
|
||||
static void set_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
|
||||
{
|
||||
unsigned flags = rhs->flags;
|
||||
lhs->selector = rhs->selector;
|
||||
lhs->base = rhs->base;
|
||||
lhs->limit = rhs->limit;
|
||||
lhs->type = (flags >> DESC_TYPE_SHIFT) & 15;
|
||||
lhs->present = (flags & DESC_P_MASK) != 0;
|
||||
lhs->dpl = rhs->selector & 3;
|
||||
lhs->db = (flags >> DESC_B_SHIFT) & 1;
|
||||
lhs->s = (flags & DESC_S_MASK) != 0;
|
||||
lhs->l = (flags >> DESC_L_SHIFT) & 1;
|
||||
lhs->g = (flags & DESC_G_MASK) != 0;
|
||||
lhs->avl = (flags & DESC_AVL_MASK) != 0;
|
||||
lhs->unusable = 0;
|
||||
}
|
||||
|
||||
static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs)
|
||||
{
|
||||
lhs->selector = rhs->selector;
|
||||
lhs->base = rhs->base;
|
||||
lhs->limit = rhs->limit;
|
||||
lhs->flags =
|
||||
(rhs->type << DESC_TYPE_SHIFT)
|
||||
| (rhs->present * DESC_P_MASK)
|
||||
| (rhs->dpl << DESC_DPL_SHIFT)
|
||||
| (rhs->db << DESC_B_SHIFT)
|
||||
| (rhs->s * DESC_S_MASK)
|
||||
| (rhs->l << DESC_L_SHIFT)
|
||||
| (rhs->g * DESC_G_MASK)
|
||||
| (rhs->avl * DESC_AVL_MASK);
|
||||
}
|
||||
|
||||
static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set)
|
||||
{
|
||||
if (set)
|
||||
*kvm_reg = *qemu_reg;
|
||||
else
|
||||
*qemu_reg = *kvm_reg;
|
||||
}
|
||||
|
||||
static int kvm_getput_regs(CPUState *env, int set)
|
||||
{
|
||||
struct kvm_regs regs;
|
||||
int ret = 0;
|
||||
|
||||
if (!set) {
|
||||
ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
kvm_getput_reg(®s.rax, &env->regs[R_EAX], set);
|
||||
kvm_getput_reg(®s.rbx, &env->regs[R_EBX], set);
|
||||
kvm_getput_reg(®s.rcx, &env->regs[R_ECX], set);
|
||||
kvm_getput_reg(®s.rdx, &env->regs[R_EDX], set);
|
||||
kvm_getput_reg(®s.rsi, &env->regs[R_ESI], set);
|
||||
kvm_getput_reg(®s.rdi, &env->regs[R_EDI], set);
|
||||
kvm_getput_reg(®s.rsp, &env->regs[R_ESP], set);
|
||||
kvm_getput_reg(®s.rbp, &env->regs[R_EBP], set);
|
||||
#ifdef TARGET_X86_64
|
||||
kvm_getput_reg(®s.r8, &env->regs[8], set);
|
||||
kvm_getput_reg(®s.r9, &env->regs[9], set);
|
||||
kvm_getput_reg(®s.r10, &env->regs[10], set);
|
||||
kvm_getput_reg(®s.r11, &env->regs[11], set);
|
||||
kvm_getput_reg(®s.r12, &env->regs[12], set);
|
||||
kvm_getput_reg(®s.r13, &env->regs[13], set);
|
||||
kvm_getput_reg(®s.r14, &env->regs[14], set);
|
||||
kvm_getput_reg(®s.r15, &env->regs[15], set);
|
||||
#endif
|
||||
|
||||
kvm_getput_reg(®s.rflags, &env->eflags, set);
|
||||
kvm_getput_reg(®s.rip, &env->eip, set);
|
||||
|
||||
if (set)
|
||||
ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, ®s);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int kvm_put_fpu(CPUState *env)
|
||||
{
|
||||
struct kvm_fpu fpu;
|
||||
int i;
|
||||
|
||||
memset(&fpu, 0, sizeof fpu);
|
||||
fpu.fsw = env->fpus & ~(7 << 11);
|
||||
fpu.fsw |= (env->fpstt & 7) << 11;
|
||||
fpu.fcw = env->fpuc;
|
||||
for (i = 0; i < 8; ++i)
|
||||
fpu.ftwx |= (!env->fptags[i]) << i;
|
||||
memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs);
|
||||
memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs);
|
||||
fpu.mxcsr = env->mxcsr;
|
||||
|
||||
return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu);
|
||||
}
|
||||
|
||||
static int kvm_put_sregs(CPUState *env)
|
||||
{
|
||||
struct kvm_sregs sregs;
|
||||
|
||||
memcpy(sregs.interrupt_bitmap,
|
||||
env->interrupt_bitmap,
|
||||
sizeof(sregs.interrupt_bitmap));
|
||||
|
||||
if ((env->eflags & VM_MASK)) {
|
||||
set_v8086_seg(&sregs.cs, &env->segs[R_CS]);
|
||||
set_v8086_seg(&sregs.ds, &env->segs[R_DS]);
|
||||
set_v8086_seg(&sregs.es, &env->segs[R_ES]);
|
||||
set_v8086_seg(&sregs.fs, &env->segs[R_FS]);
|
||||
set_v8086_seg(&sregs.gs, &env->segs[R_GS]);
|
||||
set_v8086_seg(&sregs.ss, &env->segs[R_SS]);
|
||||
} else {
|
||||
set_seg(&sregs.cs, &env->segs[R_CS]);
|
||||
set_seg(&sregs.ds, &env->segs[R_DS]);
|
||||
set_seg(&sregs.es, &env->segs[R_ES]);
|
||||
set_seg(&sregs.fs, &env->segs[R_FS]);
|
||||
set_seg(&sregs.gs, &env->segs[R_GS]);
|
||||
set_seg(&sregs.ss, &env->segs[R_SS]);
|
||||
|
||||
if (env->cr[0] & CR0_PE_MASK) {
|
||||
/* force ss cpl to cs cpl */
|
||||
sregs.ss.selector = (sregs.ss.selector & ~3) |
|
||||
(sregs.cs.selector & 3);
|
||||
sregs.ss.dpl = sregs.ss.selector & 3;
|
||||
}
|
||||
}
|
||||
|
||||
set_seg(&sregs.tr, &env->tr);
|
||||
set_seg(&sregs.ldt, &env->ldt);
|
||||
|
||||
sregs.idt.limit = env->idt.limit;
|
||||
sregs.idt.base = env->idt.base;
|
||||
sregs.gdt.limit = env->gdt.limit;
|
||||
sregs.gdt.base = env->gdt.base;
|
||||
|
||||
sregs.cr0 = env->cr[0];
|
||||
sregs.cr2 = env->cr[2];
|
||||
sregs.cr3 = env->cr[3];
|
||||
sregs.cr4 = env->cr[4];
|
||||
|
||||
sregs.cr8 = cpu_get_apic_tpr(env);
|
||||
sregs.apic_base = cpu_get_apic_base(env);
|
||||
|
||||
sregs.efer = env->efer;
|
||||
|
||||
return kvm_vcpu_ioctl(env, KVM_SET_SREGS, &sregs);
|
||||
}
|
||||
|
||||
static void kvm_msr_entry_set(struct kvm_msr_entry *entry,
|
||||
uint32_t index, uint64_t value)
|
||||
{
|
||||
entry->index = index;
|
||||
entry->data = value;
|
||||
}
|
||||
|
||||
static int kvm_put_msrs(CPUState *env)
|
||||
{
|
||||
struct {
|
||||
struct kvm_msrs info;
|
||||
struct kvm_msr_entry entries[100];
|
||||
} msr_data;
|
||||
struct kvm_msr_entry *msrs = msr_data.entries;
|
||||
int n = 0;
|
||||
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs);
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp);
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip);
|
||||
if (kvm_has_msr_star(env))
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star);
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc);
|
||||
#ifdef TARGET_X86_64
|
||||
/* FIXME if lm capable */
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase);
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask);
|
||||
kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar);
|
||||
#endif
|
||||
msr_data.info.nmsrs = n;
|
||||
|
||||
return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
|
||||
|
||||
}
|
||||
|
||||
|
||||
static int kvm_get_fpu(CPUState *env)
|
||||
{
|
||||
struct kvm_fpu fpu;
|
||||
int i, ret;
|
||||
|
||||
ret = kvm_vcpu_ioctl(env, KVM_GET_FPU, &fpu);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
env->fpstt = (fpu.fsw >> 11) & 7;
|
||||
env->fpus = fpu.fsw;
|
||||
env->fpuc = fpu.fcw;
|
||||
for (i = 0; i < 8; ++i)
|
||||
env->fptags[i] = !((fpu.ftwx >> i) & 1);
|
||||
memcpy(env->fpregs, fpu.fpr, sizeof env->fpregs);
|
||||
memcpy(env->xmm_regs, fpu.xmm, sizeof env->xmm_regs);
|
||||
env->mxcsr = fpu.mxcsr;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int kvm_get_sregs(CPUState *env)
|
||||
{
|
||||
struct kvm_sregs sregs;
|
||||
uint32_t hflags;
|
||||
int ret;
|
||||
|
||||
ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
memcpy(env->interrupt_bitmap,
|
||||
sregs.interrupt_bitmap,
|
||||
sizeof(sregs.interrupt_bitmap));
|
||||
|
||||
get_seg(&env->segs[R_CS], &sregs.cs);
|
||||
get_seg(&env->segs[R_DS], &sregs.ds);
|
||||
get_seg(&env->segs[R_ES], &sregs.es);
|
||||
get_seg(&env->segs[R_FS], &sregs.fs);
|
||||
get_seg(&env->segs[R_GS], &sregs.gs);
|
||||
get_seg(&env->segs[R_SS], &sregs.ss);
|
||||
|
||||
get_seg(&env->tr, &sregs.tr);
|
||||
get_seg(&env->ldt, &sregs.ldt);
|
||||
|
||||
env->idt.limit = sregs.idt.limit;
|
||||
env->idt.base = sregs.idt.base;
|
||||
env->gdt.limit = sregs.gdt.limit;
|
||||
env->gdt.base = sregs.gdt.base;
|
||||
|
||||
env->cr[0] = sregs.cr0;
|
||||
env->cr[2] = sregs.cr2;
|
||||
env->cr[3] = sregs.cr3;
|
||||
env->cr[4] = sregs.cr4;
|
||||
|
||||
cpu_set_apic_base(env, sregs.apic_base);
|
||||
|
||||
env->efer = sregs.efer;
|
||||
//cpu_set_apic_tpr(env, sregs.cr8);
|
||||
|
||||
#define HFLAG_COPY_MASK ~( \
|
||||
HF_CPL_MASK | HF_PE_MASK | HF_MP_MASK | HF_EM_MASK | \
|
||||
HF_TS_MASK | HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK | \
|
||||
HF_OSFXSR_MASK | HF_LMA_MASK | HF_CS32_MASK | \
|
||||
HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)
|
||||
|
||||
|
||||
|
||||
hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK;
|
||||
hflags |= (env->cr[0] & CR0_PE_MASK) << (HF_PE_SHIFT - CR0_PE_SHIFT);
|
||||
hflags |= (env->cr[0] << (HF_MP_SHIFT - CR0_MP_SHIFT)) &
|
||||
(HF_MP_MASK | HF_EM_MASK | HF_TS_MASK);
|
||||
hflags |= (env->eflags & (HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK));
|
||||
hflags |= (env->cr[4] & CR4_OSFXSR_MASK) <<
|
||||
(HF_OSFXSR_SHIFT - CR4_OSFXSR_SHIFT);
|
||||
|
||||
if (env->efer & MSR_EFER_LMA) {
|
||||
hflags |= HF_LMA_MASK;
|
||||
}
|
||||
|
||||
if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) {
|
||||
hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;
|
||||
} else {
|
||||
hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
|
||||
(DESC_B_SHIFT - HF_CS32_SHIFT);
|
||||
hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
|
||||
(DESC_B_SHIFT - HF_SS32_SHIFT);
|
||||
if (!(env->cr[0] & CR0_PE_MASK) ||
|
||||
(env->eflags & VM_MASK) ||
|
||||
!(hflags & HF_CS32_MASK)) {
|
||||
hflags |= HF_ADDSEG_MASK;
|
||||
} else {
|
||||
hflags |= ((env->segs[R_DS].base |
|
||||
env->segs[R_ES].base |
|
||||
env->segs[R_SS].base) != 0) <<
|
||||
HF_ADDSEG_SHIFT;
|
||||
}
|
||||
}
|
||||
env->hflags = (env->hflags & HFLAG_COPY_MASK) | hflags;
|
||||
env->cc_src = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
|
||||
env->df = 1 - (2 * ((env->eflags >> 10) & 1));
|
||||
env->cc_op = CC_OP_EFLAGS;
|
||||
env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int kvm_get_msrs(CPUState *env)
|
||||
{
|
||||
struct {
|
||||
struct kvm_msrs info;
|
||||
struct kvm_msr_entry entries[100];
|
||||
} msr_data;
|
||||
struct kvm_msr_entry *msrs = msr_data.entries;
|
||||
int ret, i, n;
|
||||
|
||||
n = 0;
|
||||
msrs[n++].index = MSR_IA32_SYSENTER_CS;
|
||||
msrs[n++].index = MSR_IA32_SYSENTER_ESP;
|
||||
msrs[n++].index = MSR_IA32_SYSENTER_EIP;
|
||||
if (kvm_has_msr_star(env))
|
||||
msrs[n++].index = MSR_STAR;
|
||||
msrs[n++].index = MSR_IA32_TSC;
|
||||
#ifdef TARGET_X86_64
|
||||
/* FIXME lm_capable_kernel */
|
||||
msrs[n++].index = MSR_CSTAR;
|
||||
msrs[n++].index = MSR_KERNELGSBASE;
|
||||
msrs[n++].index = MSR_FMASK;
|
||||
msrs[n++].index = MSR_LSTAR;
|
||||
#endif
|
||||
msr_data.info.nmsrs = n;
|
||||
ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
for (i = 0; i < ret; i++) {
|
||||
switch (msrs[i].index) {
|
||||
case MSR_IA32_SYSENTER_CS:
|
||||
env->sysenter_cs = msrs[i].data;
|
||||
break;
|
||||
case MSR_IA32_SYSENTER_ESP:
|
||||
env->sysenter_esp = msrs[i].data;
|
||||
break;
|
||||
case MSR_IA32_SYSENTER_EIP:
|
||||
env->sysenter_eip = msrs[i].data;
|
||||
break;
|
||||
case MSR_STAR:
|
||||
env->star = msrs[i].data;
|
||||
break;
|
||||
#ifdef TARGET_X86_64
|
||||
case MSR_CSTAR:
|
||||
env->cstar = msrs[i].data;
|
||||
break;
|
||||
case MSR_KERNELGSBASE:
|
||||
env->kernelgsbase = msrs[i].data;
|
||||
break;
|
||||
case MSR_FMASK:
|
||||
env->fmask = msrs[i].data;
|
||||
break;
|
||||
case MSR_LSTAR:
|
||||
env->lstar = msrs[i].data;
|
||||
break;
|
||||
#endif
|
||||
case MSR_IA32_TSC:
|
||||
env->tsc = msrs[i].data;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_put_registers(CPUState *env)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = kvm_getput_regs(env, 1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = kvm_put_fpu(env);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = kvm_put_sregs(env);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = kvm_put_msrs(env);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_get_registers(CPUState *env)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = kvm_getput_regs(env, 0);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = kvm_get_fpu(env);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = kvm_get_sregs(env);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = kvm_get_msrs(env);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
|
||||
{
|
||||
/* Try to inject an interrupt if the guest can accept it */
|
||||
if (run->ready_for_interrupt_injection &&
|
||||
(env->interrupt_request & CPU_INTERRUPT_HARD) &&
|
||||
(env->eflags & IF_MASK)) {
|
||||
int irq;
|
||||
|
||||
env->interrupt_request &= ~CPU_INTERRUPT_HARD;
|
||||
irq = cpu_get_pic_interrupt(env);
|
||||
if (irq >= 0) {
|
||||
struct kvm_interrupt intr;
|
||||
intr.irq = irq;
|
||||
/* FIXME: errors */
|
||||
dprintf("injected interrupt %d\n", irq);
|
||||
kvm_vcpu_ioctl(env, KVM_INTERRUPT, &intr);
|
||||
}
|
||||
}
|
||||
|
||||
/* If we have an interrupt but the guest is not ready to receive an
|
||||
* interrupt, request an interrupt window exit. This will
|
||||
* cause a return to userspace as soon as the guest is ready to
|
||||
* receive interrupts. */
|
||||
if ((env->interrupt_request & CPU_INTERRUPT_HARD))
|
||||
run->request_interrupt_window = 1;
|
||||
else
|
||||
run->request_interrupt_window = 0;
|
||||
|
||||
dprintf("setting tpr\n");
|
||||
run->cr8 = cpu_get_apic_tpr(env);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int kvm_arch_post_run(CPUState *env, struct kvm_run *run)
|
||||
{
|
||||
if (run->if_flag)
|
||||
env->eflags |= IF_MASK;
|
||||
else
|
||||
env->eflags &= ~IF_MASK;
|
||||
|
||||
cpu_set_apic_tpr(env, run->cr8);
|
||||
cpu_set_apic_base(env, run->apic_base);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int kvm_handle_halt(CPUState *env)
|
||||
{
|
||||
if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
|
||||
(env->eflags & IF_MASK)) &&
|
||||
!(env->interrupt_request & CPU_INTERRUPT_NMI)) {
|
||||
env->halted = 1;
|
||||
env->exception_index = EXCP_HLT;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
switch (run->exit_reason) {
|
||||
case KVM_EXIT_HLT:
|
||||
dprintf("handle_hlt\n");
|
||||
ret = kvm_handle_halt(env);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
Loading…
Reference in a new issue