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ds1225y nvram: Fix some bugs
- whole nvram was erased in some conditions - fix out of range accesses - improve reading speed by keeping contents in memory - rename capacity to chip_size (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4051 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32
parent
f442e08b41
commit
02cb1585fd
2 changed files with 130 additions and 59 deletions
181
hw/ds1225y.c
181
hw/ds1225y.c
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@ -1,7 +1,7 @@
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/*
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* QEMU NVRAM emulation for DS1225Y chip
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*
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* Copyright (c) 2007 Hervé Poussineau
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* Copyright (c) 2007-2008 Hervé Poussineau
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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@ -26,98 +26,169 @@
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#include "mips.h"
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#include "nvram.h"
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typedef enum
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{
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none = 0,
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readmode,
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writemode,
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} nvram_open_mode;
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//#define DEBUG_NVRAM
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struct ds1225y_t
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typedef struct ds1225y_t
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{
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target_phys_addr_t mem_base;
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uint32_t capacity;
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const char *filename;
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uint32_t chip_size;
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QEMUFile *file;
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nvram_open_mode open_mode;
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};
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uint8_t *contents;
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uint8_t protection;
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} ds1225y_t;
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static int ds1225y_set_to_mode(ds1225y_t *NVRAM, nvram_open_mode mode, const char *filemode)
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{
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if (NVRAM->open_mode != mode)
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{
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if (NVRAM->file)
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qemu_fclose(NVRAM->file);
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NVRAM->file = qemu_fopen(NVRAM->filename, filemode);
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NVRAM->open_mode = mode;
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}
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return (NVRAM->file != NULL);
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}
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static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
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{
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ds1225y_t *NVRAM = opaque;
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ds1225y_t *s = opaque;
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int64_t pos;
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uint32_t val;
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pos = addr - NVRAM->mem_base;
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if (addr >= NVRAM->capacity)
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addr -= NVRAM->capacity;
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pos = addr - s->mem_base;
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if (pos >= s->chip_size)
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pos -= s->chip_size;
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if (!ds1225y_set_to_mode(NVRAM, readmode, "rb"))
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return 0;
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qemu_fseek(NVRAM->file, pos, SEEK_SET);
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return (uint32_t)qemu_get_byte(NVRAM->file);
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val = s->contents[pos];
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#ifdef DEBUG_NVRAM
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printf("nvram: read 0x%x at " TARGET_FMT_lx "\n", val, addr);
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#endif
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return val;
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}
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static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
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static uint32_t nvram_readw (void *opaque, target_phys_addr_t addr)
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{
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ds1225y_t *NVRAM = opaque;
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uint32_t v;
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v = nvram_readb(opaque, addr);
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v |= nvram_readb(opaque, addr + 1) << 8;
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return v;
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}
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static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
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{
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uint32_t v;
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v = nvram_readb(opaque, addr);
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v |= nvram_readb(opaque, addr + 1) << 8;
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v |= nvram_readb(opaque, addr + 2) << 16;
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v |= nvram_readb(opaque, addr + 3) << 24;
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return v;
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}
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static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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ds1225y_t *s = opaque;
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int64_t pos;
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pos = addr - NVRAM->mem_base;
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if (ds1225y_set_to_mode(NVRAM, writemode, "wb"))
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{
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qemu_fseek(NVRAM->file, pos, SEEK_SET);
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qemu_put_byte(NVRAM->file, (int)value);
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#ifdef DEBUG_NVRAM
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printf("nvram: write 0x%x at " TARGET_FMT_lx "\n", val, addr);
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#endif
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pos = addr - s->mem_base;
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s->contents[pos] = val & 0xff;
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if (s->file) {
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qemu_fseek(s->file, pos, SEEK_SET);
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qemu_put_byte(s->file, (int)val);
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qemu_fflush(s->file);
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}
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}
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static void nvram_writew (void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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nvram_writeb(opaque, addr, val & 0xff);
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nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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}
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static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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nvram_writeb(opaque, addr, val & 0xff);
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nvram_writeb(opaque, addr + 1, (val >> 8) & 0xff);
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nvram_writeb(opaque, addr + 2, (val >> 16) & 0xff);
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nvram_writeb(opaque, addr + 3, (val >> 24) & 0xff);
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}
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static void nvram_writeb_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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ds1225y_t *s = opaque;
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if (s->protection != 7) {
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#ifdef DEBUG_NVRAM
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printf("nvram: prevent write of 0x%x at " TARGET_FMT_lx "\n", val, addr);
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#endif
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return;
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}
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nvram_writeb(opaque, addr - s->chip_size, val);
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}
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static void nvram_writew_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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nvram_writeb_protected(opaque, addr, val & 0xff);
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nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
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}
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static void nvram_writel_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
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{
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nvram_writeb_protected(opaque, addr, val & 0xff);
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nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
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nvram_writeb_protected(opaque, addr + 2, (val >> 16) & 0xff);
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nvram_writeb_protected(opaque, addr + 3, (val >> 24) & 0xff);
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}
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static CPUReadMemoryFunc *nvram_read[] = {
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&nvram_readb,
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NULL,
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NULL,
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&nvram_readw,
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&nvram_readl,
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};
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static CPUWriteMemoryFunc *nvram_write[] = {
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&nvram_writeb,
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NULL,
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NULL,
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&nvram_writew,
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&nvram_writel,
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};
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static CPUWriteMemoryFunc *nvram_none[] = {
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NULL,
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NULL,
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NULL,
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static CPUWriteMemoryFunc *nvram_write_protected[] = {
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&nvram_writeb_protected,
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&nvram_writew_protected,
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&nvram_writel_protected,
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};
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/* Initialisation routine */
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ds1225y_t *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
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void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
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{
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ds1225y_t *s;
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int mem_index1, mem_index2;
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int mem_indexRW, mem_indexRP;
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QEMUFile *file;
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s = qemu_mallocz(sizeof(ds1225y_t));
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if (!s)
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return NULL;
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s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
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s->contents = qemu_mallocz(s->chip_size);
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if (!s->contents) {
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return NULL;
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}
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s->mem_base = mem_base;
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s->capacity = 0x2000; /* Fixed for ds1225y chip: 8K */
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s->filename = filename;
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s->protection = 7;
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/* Read current file */
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file = qemu_fopen(filename, "rb");
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if (file) {
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/* Read nvram contents */
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qemu_get_buffer(file, s->contents, s->chip_size);
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qemu_fclose(file);
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}
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s->file = qemu_fopen(filename, "wb");
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if (s->file) {
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/* Write back contents, as 'wb' mode cleaned the file */
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qemu_put_buffer(s->file, s->contents, s->chip_size);
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qemu_fflush(s->file);
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}
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/* Read/write memory */
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mem_index1 = cpu_register_io_memory(0, nvram_read, nvram_write, s);
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cpu_register_physical_memory(mem_base, s->capacity, mem_index1);
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/* Read-only memory */
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mem_index2 = cpu_register_io_memory(0, nvram_read, nvram_none, s);
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cpu_register_physical_memory(mem_base + s->capacity, s->capacity, mem_index2);
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mem_indexRW = cpu_register_io_memory(0, nvram_read, nvram_write, s);
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cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
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/* Read/write protected memory */
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mem_indexRP = cpu_register_io_memory(0, nvram_read, nvram_write_protected, s);
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cpu_register_physical_memory(mem_base + s->chip_size, s->chip_size, mem_indexRP);
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return s;
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}
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@ -6,8 +6,8 @@
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PCIBus *pci_gt64120_init(qemu_irq *pic);
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/* ds1225y.c */
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typedef struct ds1225y_t ds1225y_t;
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ds1225y_t *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
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void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
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void ds1225y_set_protection(void *opaque, int protection);
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/* mipsnet.c */
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void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
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