2019-10-26 16:45:45 +00:00
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/*
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* QEMU Motorla 680x0 Macintosh hardware System Emulator
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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2020-10-28 11:36:57 +00:00
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#include "qemu/datadir.h"
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2022-09-26 11:38:59 +00:00
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#include "qemu/guest-random.h"
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2019-10-26 16:45:45 +00:00
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#include "sysemu/sysemu.h"
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#include "cpu.h"
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#include "hw/boards.h"
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2020-11-06 23:51:08 +00:00
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#include "hw/or-irq.h"
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2019-10-26 16:45:45 +00:00
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#include "elf.h"
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#include "hw/loader.h"
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#include "ui/console.h"
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#include "hw/char/escc.h"
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#include "hw/sysbus.h"
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#include "hw/scsi/esp.h"
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2020-12-20 11:26:09 +00:00
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#include "standard-headers/asm-m68k/bootinfo.h"
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#include "standard-headers/asm-m68k/bootinfo-mac.h"
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2019-10-26 16:45:45 +00:00
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#include "bootinfo.h"
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2023-06-21 08:53:32 +00:00
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#include "hw/m68k/q800.h"
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2023-06-21 08:53:36 +00:00
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#include "hw/m68k/q800-glue.h"
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2019-10-26 16:45:45 +00:00
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#include "hw/misc/mac_via.h"
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2023-10-04 08:37:48 +00:00
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#include "hw/misc/djmemc.h"
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2023-10-04 08:37:51 +00:00
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#include "hw/misc/iosb.h"
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2019-10-26 16:45:45 +00:00
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#include "hw/input/adb.h"
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2023-10-04 08:37:55 +00:00
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#include "hw/audio/asc.h"
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2019-10-26 16:45:45 +00:00
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#include "hw/nubus/mac-nubus-bridge.h"
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#include "hw/display/macfb.h"
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#include "hw/block/swim.h"
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#include "net/net.h"
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2023-10-23 08:37:45 +00:00
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#include "net/util.h"
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2019-10-26 16:45:45 +00:00
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#include "qapi/error.h"
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2023-03-15 17:43:13 +00:00
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#include "qemu/error-report.h"
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2019-10-26 16:45:45 +00:00
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#include "sysemu/qtest.h"
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#include "sysemu/runstate.h"
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#include "sysemu/reset.h"
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2020-11-06 23:51:09 +00:00
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#include "migration/vmstate.h"
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2019-10-26 16:45:45 +00:00
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2020-01-02 12:01:50 +00:00
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#define MACROM_ADDR 0x40800000
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2019-10-26 16:45:45 +00:00
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#define MACROM_SIZE 0x00100000
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#define MACROM_FILENAME "MacROM.bin"
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2019-11-04 10:15:13 +00:00
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#define IO_BASE 0x50000000
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#define IO_SLICE 0x00040000
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2023-06-21 08:53:40 +00:00
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#define IO_SLICE_MASK (IO_SLICE - 1)
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2019-11-04 10:15:13 +00:00
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#define IO_SIZE 0x04000000
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#define VIA_BASE (IO_BASE + 0x00000)
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#define SONIC_PROM_BASE (IO_BASE + 0x08000)
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#define SONIC_BASE (IO_BASE + 0x0a000)
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#define SCC_BASE (IO_BASE + 0x0c020)
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2023-10-04 08:37:48 +00:00
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#define DJMEMC_BASE (IO_BASE + 0x0e000)
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2019-11-04 10:15:13 +00:00
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#define ESP_BASE (IO_BASE + 0x10000)
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#define ESP_PDMA (IO_BASE + 0x10100)
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#define ASC_BASE (IO_BASE + 0x14000)
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2023-10-04 08:37:51 +00:00
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#define IOSB_BASE (IO_BASE + 0x18000)
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2019-11-04 10:15:13 +00:00
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#define SWIM_BASE (IO_BASE + 0x1E000)
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2021-06-25 06:53:55 +00:00
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#define SONIC_PROM_SIZE 0x1000
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2019-10-26 16:45:45 +00:00
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/*
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* the video base, whereas it a Nubus address,
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* is needed by the kernel to have early display and
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* thus provided by the bootloader
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*/
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2021-10-07 22:12:49 +00:00
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#define VIDEO_BASE 0xf9000000
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2019-10-26 16:45:45 +00:00
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#define MAC_CLOCK 3686418
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2023-10-04 08:37:52 +00:00
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/* Size of whole RAM area */
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#define RAM_SIZE 0x40000000
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2021-09-24 07:38:08 +00:00
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/*
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* Slot 0x9 is reserved for use by the in-built framebuffer whilst only
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* slots 0xc, 0xd and 0xe physically exist on the Quadra 800
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*/
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#define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \
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BIT(0xe))
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2023-10-04 08:37:49 +00:00
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/* Quadra 800 machine ID */
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#define Q800_MACHINE_ID 0xa55a2bad
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2020-11-06 23:51:09 +00:00
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2019-10-26 16:45:45 +00:00
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static void main_cpu_reset(void *opaque)
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{
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2022-10-25 00:43:23 +00:00
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M68kCPU *cpu = opaque;
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2019-10-26 16:45:45 +00:00
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CPUState *cs = CPU(cpu);
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cpu_reset(cs);
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cpu->env.aregs[7] = ldl_phys(cs->as, 0);
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cpu->env.pc = ldl_phys(cs->as, 4);
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}
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2022-10-25 00:43:23 +00:00
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static void rerandomize_rng_seed(void *opaque)
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{
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struct bi_record *rng_seed = opaque;
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qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
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be16_to_cpu(*(uint16_t *)rng_seed->data));
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}
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2020-01-02 12:01:50 +00:00
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static uint8_t fake_mac_rom[] = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* offset: 0xa - mac_reset */
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/* via2[vDirB] |= VIA2B_vPower */
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0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */
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0x10, 0x10, /* moveb %a0@,%d0 */
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0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */
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0x10, 0x80, /* moveb %d0,%a0@ */
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/* via2[vBufB] &= ~VIA2B_vPower */
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0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */
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0x10, 0x10, /* moveb %a0@,%d0 */
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0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */
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0x10, 0x80, /* moveb %d0,%a0@ */
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/* while (true) ; */
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0x60, 0xFE /* bras [self] */
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};
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2023-06-21 08:53:40 +00:00
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static MemTxResult macio_alias_read(void *opaque, hwaddr addr, uint64_t *data,
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unsigned size, MemTxAttrs attrs)
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{
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MemTxResult r;
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uint32_t val;
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addr &= IO_SLICE_MASK;
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addr |= IO_BASE;
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switch (size) {
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case 4:
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val = address_space_ldl_be(&address_space_memory, addr, attrs, &r);
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break;
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case 2:
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val = address_space_lduw_be(&address_space_memory, addr, attrs, &r);
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break;
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case 1:
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val = address_space_ldub(&address_space_memory, addr, attrs, &r);
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break;
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default:
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g_assert_not_reached();
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}
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*data = val;
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return r;
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}
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static MemTxResult macio_alias_write(void *opaque, hwaddr addr, uint64_t value,
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unsigned size, MemTxAttrs attrs)
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{
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MemTxResult r;
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addr &= IO_SLICE_MASK;
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addr |= IO_BASE;
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switch (size) {
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case 4:
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address_space_stl_be(&address_space_memory, addr, value, attrs, &r);
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break;
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case 2:
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address_space_stw_be(&address_space_memory, addr, value, attrs, &r);
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break;
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case 1:
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address_space_stb(&address_space_memory, addr, value, attrs, &r);
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break;
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default:
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g_assert_not_reached();
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}
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return r;
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}
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static const MemoryRegionOps macio_alias_ops = {
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.read_with_attrs = macio_alias_read,
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.write_with_attrs = macio_alias_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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};
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2023-10-04 08:37:49 +00:00
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static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size)
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{
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return Q800_MACHINE_ID;
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}
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static void machine_id_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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return;
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}
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static const MemoryRegionOps machine_id_ops = {
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.read = machine_id_read,
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.write = machine_id_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.valid = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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};
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2023-10-04 08:37:52 +00:00
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static uint64_t ramio_read(void *opaque, hwaddr addr, unsigned size)
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{
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return 0x0;
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}
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static void ramio_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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return;
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}
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static const MemoryRegionOps ramio_ops = {
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.read = ramio_read,
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.write = ramio_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 4,
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},
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};
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2023-06-21 08:53:33 +00:00
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static void q800_machine_init(MachineState *machine)
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2019-10-26 16:45:45 +00:00
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{
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2023-06-21 08:53:34 +00:00
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Q800MachineState *m = Q800_MACHINE(machine);
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2019-10-26 16:45:45 +00:00
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int linux_boot;
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int32_t kernel_size;
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uint64_t elf_entry;
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char *filename;
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int bios_size;
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ram_addr_t initrd_base;
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int32_t initrd_size;
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2021-06-25 06:53:55 +00:00
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uint8_t *prom;
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int i, checksum;
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2021-10-07 22:12:49 +00:00
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MacFbMode *macfb_mode;
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2019-10-26 16:45:45 +00:00
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ram_addr_t ram_size = machine->ram_size;
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const char *kernel_filename = machine->kernel_filename;
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const char *initrd_filename = machine->initrd_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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2020-10-26 14:30:20 +00:00
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const char *bios_name = machine->firmware ?: MACROM_FILENAME;
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2019-10-26 16:45:45 +00:00
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hwaddr parameters_base;
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CPUState *cs;
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DeviceState *dev;
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SysBusESPState *sysbus_esp;
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ESPState *esp;
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SysBusDevice *sysbus;
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BusState *adb_bus;
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NubusBus *nubus;
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2019-12-19 20:14:39 +00:00
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DriveInfo *dinfo;
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2023-10-23 08:37:45 +00:00
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NICInfo *nd;
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MACAddr mac;
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2022-09-26 11:38:59 +00:00
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uint8_t rng_seed[32];
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2019-10-26 16:45:45 +00:00
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linux_boot = (kernel_filename != NULL);
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if (ram_size > 1 * GiB) {
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error_report("Too much memory for this machine: %" PRId64 " MiB, "
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"maximum 1024 MiB", ram_size / MiB);
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exit(1);
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}
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/* init CPUs */
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2023-06-21 08:53:34 +00:00
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object_initialize_child(OBJECT(machine), "cpu", &m->cpu, machine->cpu_type);
|
|
|
|
|
qdev_realize(DEVICE(&m->cpu), NULL, &error_fatal);
|
|
|
|
|
qemu_register_reset(main_cpu_reset, &m->cpu);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2019-11-04 10:15:13 +00:00
|
|
|
/* RAM */
|
2023-10-04 08:37:52 +00:00
|
|
|
memory_region_init_io(&m->ramio, OBJECT(machine), &ramio_ops, &m->ramio,
|
|
|
|
|
"ram", RAM_SIZE);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), 0x0, &m->ramio);
|
|
|
|
|
|
|
|
|
|
memory_region_add_subregion(&m->ramio, 0, machine->ram);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2023-06-21 08:53:39 +00:00
|
|
|
/*
|
|
|
|
|
* Create container for all IO devices
|
|
|
|
|
*/
|
|
|
|
|
memory_region_init(&m->macio, OBJECT(machine), "mac-io", IO_SLICE);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), IO_BASE, &m->macio);
|
|
|
|
|
|
2019-11-04 10:15:13 +00:00
|
|
|
/*
|
|
|
|
|
* Memory from IO_BASE to IO_BASE + IO_SLICE is repeated
|
|
|
|
|
* from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE
|
|
|
|
|
*/
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_init_io(&m->macio_alias, OBJECT(machine), &macio_alias_ops,
|
|
|
|
|
&m->macio, "mac-io.alias", IO_SIZE - IO_SLICE);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), IO_BASE + IO_SLICE,
|
|
|
|
|
&m->macio_alias);
|
2019-11-04 10:15:13 +00:00
|
|
|
|
2023-10-04 08:37:49 +00:00
|
|
|
memory_region_init_io(&m->machine_id, NULL, &machine_id_ops, NULL,
|
|
|
|
|
"Machine ID", 4);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), 0x5ffffffc,
|
|
|
|
|
&m->machine_id);
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* IRQ Glue */
|
2023-06-21 08:53:38 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "glue", &m->glue, TYPE_GLUE);
|
|
|
|
|
object_property_set_link(OBJECT(&m->glue), "cpu", OBJECT(&m->cpu),
|
2023-06-21 08:53:34 +00:00
|
|
|
&error_abort);
|
2023-06-21 08:53:38 +00:00
|
|
|
sysbus_realize(SYS_BUS_DEVICE(&m->glue), &error_fatal);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2023-10-04 08:37:48 +00:00
|
|
|
/* djMEMC memory controller */
|
|
|
|
|
object_initialize_child(OBJECT(machine), "djmemc", &m->djmemc,
|
|
|
|
|
TYPE_DJMEMC);
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(&m->djmemc);
|
|
|
|
|
sysbus_realize_and_unref(sysbus, &error_fatal);
|
|
|
|
|
memory_region_add_subregion(&m->macio, DJMEMC_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
|
|
|
|
|
2023-10-04 08:37:51 +00:00
|
|
|
/* IOSB subsystem */
|
|
|
|
|
object_initialize_child(OBJECT(machine), "iosb", &m->iosb, TYPE_IOSB);
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(&m->iosb);
|
|
|
|
|
sysbus_realize_and_unref(sysbus, &error_fatal);
|
|
|
|
|
memory_region_add_subregion(&m->macio, IOSB_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
|
|
|
|
|
2021-08-30 10:24:44 +00:00
|
|
|
/* VIA 1 */
|
2023-06-21 08:53:41 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "via1", &m->via1,
|
|
|
|
|
TYPE_MOS6522_Q800_VIA1);
|
2019-12-19 20:14:39 +00:00
|
|
|
dinfo = drive_get(IF_MTD, 0, 0);
|
|
|
|
|
if (dinfo) {
|
2023-06-21 08:53:41 +00:00
|
|
|
qdev_prop_set_drive(DEVICE(&m->via1), "drive",
|
|
|
|
|
blk_by_legacy_dinfo(dinfo));
|
2019-12-19 20:14:39 +00:00
|
|
|
}
|
2023-06-21 08:53:41 +00:00
|
|
|
sysbus = SYS_BUS_DEVICE(&m->via1);
|
|
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 1));
|
2023-06-21 08:53:38 +00:00
|
|
|
sysbus_connect_irq(sysbus, 0,
|
|
|
|
|
qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA1));
|
2021-10-20 13:41:28 +00:00
|
|
|
/* A/UX mode */
|
2023-06-21 08:53:41 +00:00
|
|
|
qdev_connect_gpio_out(DEVICE(&m->via1), 0,
|
2023-06-21 08:53:38 +00:00
|
|
|
qdev_get_gpio_in_named(DEVICE(&m->glue),
|
|
|
|
|
"auxmode", 0));
|
2021-08-30 10:24:44 +00:00
|
|
|
|
2023-06-21 08:53:41 +00:00
|
|
|
adb_bus = qdev_get_child_bus(DEVICE(&m->via1), "adb.0");
|
qdev: Convert uses of qdev_create() with Coccinelle
This is the transformation explained in the commit before previous.
Takes care of just one pattern that needs conversion. More to come in
this series.
Coccinelle script:
@ depends on !(file in "hw/arm/highbank.c")@
expression bus, type_name, dev, expr;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr;
identifier DOWN;
@@
- dev = DOWN(qdev_create(bus, type_name));
+ dev = DOWN(qdev_new(type_name));
... when != dev = expr
- qdev_init_nofail(DEVICE(dev));
+ qdev_realize_and_unref(DEVICE(dev), bus, &error_fatal);
@@
expression bus, type_name, expr;
identifier dev;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- qdev_init_nofail(dev);
+ qdev_realize_and_unref(dev, bus, &error_fatal);
@@
expression bus, type_name, dev, expr, errp;
symbol true;
@@
- dev = qdev_create(bus, type_name);
+ dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
@@
expression bus, type_name, expr, errp;
identifier dev;
symbol true;
@@
- DeviceState *dev = qdev_create(bus, type_name);
+ DeviceState *dev = qdev_new(type_name);
... when != dev = expr
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize_and_unref(dev, bus, errp);
The first rule exempts hw/arm/highbank.c, because it matches along two
control flow paths there, with different @type_name. Covered by the
next commit's manual conversions.
Missing #include "qapi/error.h" added manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-10-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 05:31:58 +00:00
|
|
|
dev = qdev_new(TYPE_ADB_KEYBOARD);
|
|
|
|
|
qdev_realize_and_unref(dev, adb_bus, &error_fatal);
|
|
|
|
|
dev = qdev_new(TYPE_ADB_MOUSE);
|
|
|
|
|
qdev_realize_and_unref(dev, adb_bus, &error_fatal);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2021-08-30 10:24:44 +00:00
|
|
|
/* VIA 2 */
|
2023-06-21 08:53:42 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "via2", &m->via2,
|
|
|
|
|
TYPE_MOS6522_Q800_VIA2);
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(&m->via2);
|
|
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_add_subregion(&m->macio, VIA_BASE - IO_BASE + VIA_SIZE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 1));
|
2023-06-21 08:53:38 +00:00
|
|
|
sysbus_connect_irq(sysbus, 0,
|
|
|
|
|
qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_VIA2));
|
2021-08-30 10:24:44 +00:00
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* MACSONIC */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* MacSonic driver needs an Apple MAC address
|
|
|
|
|
* Valid prefix are:
|
|
|
|
|
* 00:05:02 Apple
|
|
|
|
|
* 00:80:19 Dayna Communications, Inc.
|
|
|
|
|
* 00:A0:40 Apple
|
|
|
|
|
* 08:00:07 Apple
|
|
|
|
|
* (Q800 use the last one)
|
|
|
|
|
*/
|
2023-06-21 08:53:44 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "dp8393x", &m->dp8393x,
|
|
|
|
|
TYPE_DP8393X);
|
|
|
|
|
dev = DEVICE(&m->dp8393x);
|
2023-10-23 08:37:45 +00:00
|
|
|
nd = qemu_find_nic_info(TYPE_DP8393X, true, "dp83932");
|
|
|
|
|
if (nd) {
|
|
|
|
|
qdev_set_nic_properties(dev, nd);
|
|
|
|
|
memcpy(mac.a, nd->macaddr.a, sizeof(mac.a));
|
|
|
|
|
} else {
|
|
|
|
|
qemu_macaddr_default_if_unset(&mac);
|
|
|
|
|
}
|
|
|
|
|
mac.a[0] = 0x08;
|
|
|
|
|
mac.a[1] = 0x00;
|
|
|
|
|
mac.a[2] = 0x07;
|
|
|
|
|
qdev_prop_set_macaddr(dev, "mac", mac.a);
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
qdev_prop_set_uint8(dev, "it_shift", 2);
|
|
|
|
|
qdev_prop_set_bit(dev, "big_endian", true);
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 16:05:54 +00:00
|
|
|
object_property_set_link(OBJECT(dev), "dma_mr",
|
|
|
|
|
OBJECT(get_system_memory()), &error_abort);
|
2019-10-26 16:45:45 +00:00
|
|
|
sysbus = SYS_BUS_DEVICE(dev);
|
2023-06-21 08:53:44 +00:00
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_add_subregion(&m->macio, SONIC_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
2023-06-21 08:53:38 +00:00
|
|
|
sysbus_connect_irq(sysbus, 0,
|
|
|
|
|
qdev_get_gpio_in(DEVICE(&m->glue), GLUE_IRQ_IN_SONIC));
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2023-12-27 21:02:12 +00:00
|
|
|
memory_region_init_rom(&m->dp8393x_prom, NULL, "dp8393x-q800.prom",
|
2021-06-25 06:53:55 +00:00
|
|
|
SONIC_PROM_SIZE, &error_fatal);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE,
|
2023-12-27 21:02:12 +00:00
|
|
|
&m->dp8393x_prom);
|
2021-06-25 06:53:55 +00:00
|
|
|
|
|
|
|
|
/* Add MAC address with valid checksum to PROM */
|
2023-12-27 21:02:12 +00:00
|
|
|
prom = memory_region_get_ram_ptr(&m->dp8393x_prom);
|
2021-06-25 06:53:55 +00:00
|
|
|
checksum = 0;
|
|
|
|
|
for (i = 0; i < 6; i++) {
|
2023-10-23 08:37:45 +00:00
|
|
|
prom[i] = revbit8(mac.a[i]);
|
2021-06-25 06:53:58 +00:00
|
|
|
checksum ^= prom[i];
|
2021-06-25 06:53:55 +00:00
|
|
|
}
|
|
|
|
|
prom[7] = 0xff - checksum;
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* SCC */
|
|
|
|
|
|
2023-06-21 08:53:45 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "escc", &m->escc,
|
|
|
|
|
TYPE_ESCC);
|
|
|
|
|
dev = DEVICE(&m->escc);
|
2019-10-26 16:45:45 +00:00
|
|
|
qdev_prop_set_uint32(dev, "disabled", 0);
|
|
|
|
|
qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
|
|
|
|
|
qdev_prop_set_uint32(dev, "it_shift", 1);
|
|
|
|
|
qdev_prop_set_bit(dev, "bit_swap", true);
|
|
|
|
|
qdev_prop_set_chr(dev, "chrA", serial_hd(0));
|
|
|
|
|
qdev_prop_set_chr(dev, "chrB", serial_hd(1));
|
|
|
|
|
qdev_prop_set_uint32(dev, "chnBtype", 0);
|
|
|
|
|
qdev_prop_set_uint32(dev, "chnAtype", 0);
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(dev);
|
2023-06-21 08:53:45 +00:00
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
2020-11-06 23:51:08 +00:00
|
|
|
|
|
|
|
|
/* Logically OR both its IRQs together */
|
2023-06-21 08:53:46 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "escc_orgate", &m->escc_orgate,
|
|
|
|
|
TYPE_OR_IRQ);
|
|
|
|
|
object_property_set_int(OBJECT(&m->escc_orgate), "num-lines", 2,
|
|
|
|
|
&error_fatal);
|
|
|
|
|
dev = DEVICE(&m->escc_orgate);
|
|
|
|
|
qdev_realize(dev, NULL, &error_fatal);
|
|
|
|
|
sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(dev, 0));
|
|
|
|
|
sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(dev, 1));
|
|
|
|
|
qdev_connect_gpio_out(dev, 0,
|
2023-06-21 08:53:38 +00:00
|
|
|
qdev_get_gpio_in(DEVICE(&m->glue),
|
|
|
|
|
GLUE_IRQ_IN_ESCC));
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2023-10-04 08:38:04 +00:00
|
|
|
/* Create alias for NetBSD */
|
|
|
|
|
memory_region_init_alias(&m->escc_alias, OBJECT(machine), "escc-alias",
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0), 0, 0x8);
|
|
|
|
|
memory_region_add_subregion(&m->macio, SCC_BASE - IO_BASE - 0x20,
|
|
|
|
|
&m->escc_alias);
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* SCSI */
|
|
|
|
|
|
2023-06-21 08:53:47 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "esp", &m->esp,
|
|
|
|
|
TYPE_SYSBUS_ESP);
|
|
|
|
|
sysbus_esp = SYSBUS_ESP(&m->esp);
|
2019-10-26 16:45:45 +00:00
|
|
|
esp = &sysbus_esp->esp;
|
|
|
|
|
esp->dma_memory_read = NULL;
|
|
|
|
|
esp->dma_memory_write = NULL;
|
|
|
|
|
esp->dma_opaque = NULL;
|
|
|
|
|
sysbus_esp->it_shift = 4;
|
|
|
|
|
esp->dma_enabled = 1;
|
|
|
|
|
|
2023-06-21 08:53:47 +00:00
|
|
|
sysbus = SYS_BUS_DEVICE(&m->esp);
|
|
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
2022-03-05 15:09:56 +00:00
|
|
|
/* SCSI and SCSI data IRQs are negative edge triggered */
|
2023-06-21 08:53:42 +00:00
|
|
|
sysbus_connect_irq(sysbus, 0,
|
|
|
|
|
qemu_irq_invert(
|
|
|
|
|
qdev_get_gpio_in(DEVICE(&m->via2),
|
|
|
|
|
VIA2_IRQ_SCSI_BIT)));
|
|
|
|
|
sysbus_connect_irq(sysbus, 1,
|
|
|
|
|
qemu_irq_invert(
|
|
|
|
|
qdev_get_gpio_in(DEVICE(&m->via2),
|
|
|
|
|
VIA2_IRQ_SCSI_DATA_BIT)));
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_add_subregion(&m->macio, ESP_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
|
|
|
|
memory_region_add_subregion(&m->macio, ESP_PDMA - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 1));
|
2019-10-26 16:45:45 +00:00
|
|
|
|
|
|
|
|
scsi_bus_legacy_handle_cmdline(&esp->bus);
|
|
|
|
|
|
2023-10-04 08:37:55 +00:00
|
|
|
/* Apple Sound Chip */
|
|
|
|
|
|
|
|
|
|
object_initialize_child(OBJECT(machine), "asc", &m->asc, TYPE_ASC);
|
2023-10-04 08:37:56 +00:00
|
|
|
qdev_prop_set_uint8(DEVICE(&m->asc), "asctype", m->easc ? ASC_TYPE_EASC
|
|
|
|
|
: ASC_TYPE_ASC);
|
2023-10-04 08:37:55 +00:00
|
|
|
if (machine->audiodev) {
|
|
|
|
|
qdev_prop_set_string(DEVICE(&m->asc), "audiodev", machine->audiodev);
|
|
|
|
|
}
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(&m->asc);
|
|
|
|
|
sysbus_realize_and_unref(sysbus, &error_fatal);
|
|
|
|
|
memory_region_add_subregion(&m->macio, ASC_BASE - IO_BASE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
|
|
|
|
sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(DEVICE(&m->glue),
|
|
|
|
|
GLUE_IRQ_IN_ASC));
|
|
|
|
|
|
|
|
|
|
/* Wire ASC IRQ via GLUE for use in classic mode */
|
|
|
|
|
qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_ASC,
|
|
|
|
|
qdev_get_gpio_in(DEVICE(&m->via2),
|
|
|
|
|
VIA2_IRQ_ASC_BIT));
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* SWIM floppy controller */
|
|
|
|
|
|
2023-06-21 08:53:48 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "swim", &m->swim,
|
|
|
|
|
TYPE_SWIM);
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(&m->swim);
|
|
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
2023-06-21 08:53:40 +00:00
|
|
|
memory_region_add_subregion(&m->macio, SWIM_BASE - IO_BASE,
|
2023-06-21 08:53:48 +00:00
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
2019-10-26 16:45:45 +00:00
|
|
|
|
|
|
|
|
/* NuBus */
|
|
|
|
|
|
2023-06-21 08:53:49 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "mac-nubus-bridge",
|
|
|
|
|
&m->mac_nubus_bridge,
|
|
|
|
|
TYPE_MAC_NUBUS_BRIDGE);
|
|
|
|
|
sysbus = SYS_BUS_DEVICE(&m->mac_nubus_bridge);
|
|
|
|
|
dev = DEVICE(&m->mac_nubus_bridge);
|
|
|
|
|
qdev_prop_set_uint32(DEVICE(&m->mac_nubus_bridge), "slot-available-mask",
|
2021-09-24 07:38:08 +00:00
|
|
|
Q800_NUBUS_SLOTS_AVAILABLE);
|
2023-06-21 08:53:49 +00:00
|
|
|
sysbus_realize(sysbus, &error_fatal);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(),
|
|
|
|
|
MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 0));
|
|
|
|
|
memory_region_add_subregion(get_system_memory(),
|
|
|
|
|
NUBUS_SLOT_BASE +
|
|
|
|
|
MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE,
|
|
|
|
|
sysbus_mmio_get_region(sysbus, 1));
|
2021-10-07 22:12:53 +00:00
|
|
|
qdev_connect_gpio_out(dev, 9,
|
2023-06-21 08:53:42 +00:00
|
|
|
qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
|
2021-10-07 22:12:53 +00:00
|
|
|
VIA2_NUBUS_IRQ_INTVIDEO));
|
|
|
|
|
for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) {
|
2021-09-24 07:38:07 +00:00
|
|
|
qdev_connect_gpio_out(dev, 9 + i,
|
2023-06-21 08:53:42 +00:00
|
|
|
qdev_get_gpio_in_named(DEVICE(&m->via2),
|
|
|
|
|
"nubus-irq",
|
2021-09-24 07:38:07 +00:00
|
|
|
VIA2_NUBUS_IRQ_9 + i));
|
|
|
|
|
}
|
|
|
|
|
|
2021-10-20 13:41:29 +00:00
|
|
|
/*
|
|
|
|
|
* Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused
|
|
|
|
|
* IRQ via GLUE for use by SONIC Ethernet in classic mode
|
|
|
|
|
*/
|
2023-06-21 08:53:38 +00:00
|
|
|
qdev_connect_gpio_out(DEVICE(&m->glue), GLUE_IRQ_NUBUS_9,
|
2023-06-21 08:53:42 +00:00
|
|
|
qdev_get_gpio_in_named(DEVICE(&m->via2), "nubus-irq",
|
2021-10-20 13:41:29 +00:00
|
|
|
VIA2_NUBUS_IRQ_9));
|
|
|
|
|
|
2023-06-21 08:53:50 +00:00
|
|
|
nubus = NUBUS_BUS(qdev_get_child_bus(dev, "nubus-bus.0"));
|
2019-10-26 16:45:45 +00:00
|
|
|
|
|
|
|
|
/* framebuffer in nubus slot #9 */
|
|
|
|
|
|
2023-06-21 08:53:51 +00:00
|
|
|
object_initialize_child(OBJECT(machine), "macfb", &m->macfb,
|
|
|
|
|
TYPE_NUBUS_MACFB);
|
|
|
|
|
dev = DEVICE(&m->macfb);
|
2021-10-07 22:12:53 +00:00
|
|
|
qdev_prop_set_uint32(dev, "slot", 9);
|
2019-10-26 16:45:45 +00:00
|
|
|
qdev_prop_set_uint32(dev, "width", graphic_width);
|
|
|
|
|
qdev_prop_set_uint32(dev, "height", graphic_height);
|
|
|
|
|
qdev_prop_set_uint8(dev, "depth", graphic_depth);
|
2021-10-20 14:18:10 +00:00
|
|
|
if (graphic_width == 1152 && graphic_height == 870) {
|
2021-10-07 22:12:48 +00:00
|
|
|
qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR);
|
|
|
|
|
} else {
|
|
|
|
|
qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA);
|
|
|
|
|
}
|
2023-06-21 08:53:51 +00:00
|
|
|
qdev_realize(dev, BUS(nubus), &error_fatal);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2021-10-07 22:12:49 +00:00
|
|
|
macfb_mode = (NUBUS_MACFB(dev)->macfb).mode;
|
|
|
|
|
|
2023-06-21 08:53:34 +00:00
|
|
|
cs = CPU(&m->cpu);
|
2019-10-26 16:45:45 +00:00
|
|
|
if (linux_boot) {
|
|
|
|
|
uint64_t high;
|
2022-10-23 19:13:41 +00:00
|
|
|
void *param_blob, *param_ptr, *param_rng_seed;
|
|
|
|
|
|
|
|
|
|
if (kernel_cmdline) {
|
|
|
|
|
param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
|
|
|
|
|
} else {
|
|
|
|
|
param_blob = g_malloc(1024);
|
|
|
|
|
}
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
|
2020-01-26 22:55:04 +00:00
|
|
|
&elf_entry, NULL, &high, NULL, 1,
|
2019-10-26 16:45:45 +00:00
|
|
|
EM_68K, 0, 0);
|
|
|
|
|
if (kernel_size < 0) {
|
|
|
|
|
error_report("could not load kernel '%s'", kernel_filename);
|
|
|
|
|
exit(1);
|
|
|
|
|
}
|
|
|
|
|
stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
|
|
|
|
|
parameters_base = (high + 1) & ~1;
|
2022-10-23 19:13:41 +00:00
|
|
|
param_ptr = param_blob;
|
|
|
|
|
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_MAC);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MAC_CPUID, CPUB_68040);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MAC_MODEL, MAC_MODEL_Q800);
|
|
|
|
|
BOOTINFO1(param_ptr,
|
2019-10-26 16:45:45 +00:00
|
|
|
BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MAC_VADDR,
|
2021-10-07 22:12:49 +00:00
|
|
|
VIDEO_BASE + macfb_mode->offset);
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFO1(param_ptr, BI_MAC_VDEPTH, graphic_depth);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MAC_VDIM,
|
2019-10-26 16:45:45 +00:00
|
|
|
(graphic_height << 16) | graphic_width);
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFO1(param_ptr, BI_MAC_VROW, macfb_mode->stride);
|
|
|
|
|
BOOTINFO1(param_ptr, BI_MAC_SCCBASE, SCC_BASE);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2023-06-21 08:53:35 +00:00
|
|
|
memory_region_init_ram_ptr(&m->rom, NULL, "m68k_fake_mac.rom",
|
2020-01-02 12:01:50 +00:00
|
|
|
sizeof(fake_mac_rom), fake_mac_rom);
|
2023-06-21 08:53:35 +00:00
|
|
|
memory_region_set_readonly(&m->rom, true);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
|
2020-01-02 12:01:50 +00:00
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
if (kernel_cmdline) {
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
|
2019-10-26 16:45:45 +00:00
|
|
|
kernel_cmdline);
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-26 11:38:59 +00:00
|
|
|
/* Pass seed to RNG. */
|
2022-10-23 19:13:41 +00:00
|
|
|
param_rng_seed = param_ptr;
|
2022-09-26 11:38:59 +00:00
|
|
|
qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFODATA(param_ptr, BI_RNG_SEED,
|
2022-09-26 11:38:59 +00:00
|
|
|
rng_seed, sizeof(rng_seed));
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* load initrd */
|
|
|
|
|
if (initrd_filename) {
|
|
|
|
|
initrd_size = get_image_size(initrd_filename);
|
|
|
|
|
if (initrd_size < 0) {
|
|
|
|
|
error_report("could not load initial ram disk '%s'",
|
|
|
|
|
initrd_filename);
|
|
|
|
|
exit(1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
|
|
|
|
|
load_image_targphys(initrd_filename, initrd_base,
|
|
|
|
|
ram_size - initrd_base);
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
|
2019-10-26 16:45:45 +00:00
|
|
|
initrd_size);
|
|
|
|
|
} else {
|
|
|
|
|
initrd_base = 0;
|
|
|
|
|
initrd_size = 0;
|
|
|
|
|
}
|
2022-10-23 19:13:41 +00:00
|
|
|
BOOTINFO0(param_ptr, BI_LAST);
|
|
|
|
|
rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
|
|
|
|
|
parameters_base, cs->as);
|
2022-10-25 00:43:23 +00:00
|
|
|
qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
|
|
|
|
|
rom_ptr_for_as(cs->as, parameters_base,
|
|
|
|
|
param_ptr - param_blob) +
|
|
|
|
|
(param_rng_seed - param_blob));
|
2022-10-23 19:13:41 +00:00
|
|
|
g_free(param_blob);
|
2019-10-26 16:45:45 +00:00
|
|
|
} else {
|
|
|
|
|
uint8_t *ptr;
|
|
|
|
|
/* allocate and load BIOS */
|
2023-06-21 08:53:35 +00:00
|
|
|
memory_region_init_rom(&m->rom, NULL, "m68k_mac.rom", MACROM_SIZE,
|
2019-10-26 16:45:45 +00:00
|
|
|
&error_abort);
|
|
|
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
|
2023-06-21 08:53:35 +00:00
|
|
|
memory_region_add_subregion(get_system_memory(), MACROM_ADDR, &m->rom);
|
2019-10-26 16:45:45 +00:00
|
|
|
|
2023-10-04 08:38:05 +00:00
|
|
|
memory_region_init_alias(&m->rom_alias, NULL, "m68k_mac.rom-alias",
|
|
|
|
|
&m->rom, 0, MACROM_SIZE);
|
|
|
|
|
memory_region_add_subregion(get_system_memory(), 0x40000000,
|
|
|
|
|
&m->rom_alias);
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
/* Load MacROM binary */
|
|
|
|
|
if (filename) {
|
|
|
|
|
bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
|
|
|
|
|
g_free(filename);
|
|
|
|
|
} else {
|
|
|
|
|
bios_size = -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Remove qtest_enabled() check once firmware files are in the tree */
|
|
|
|
|
if (!qtest_enabled()) {
|
2022-01-07 10:50:49 +00:00
|
|
|
if (bios_size <= 0 || bios_size > MACROM_SIZE) {
|
2019-10-26 16:45:45 +00:00
|
|
|
error_report("could not load MacROM '%s'", bios_name);
|
|
|
|
|
exit(1);
|
|
|
|
|
}
|
|
|
|
|
|
2022-01-07 10:50:49 +00:00
|
|
|
ptr = rom_ptr(MACROM_ADDR, bios_size);
|
|
|
|
|
assert(ptr != NULL);
|
2019-10-26 16:45:45 +00:00
|
|
|
stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
|
|
|
|
|
stl_phys(cs->as, 4,
|
|
|
|
|
MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-10-04 08:37:56 +00:00
|
|
|
static bool q800_get_easc(Object *obj, Error **errp)
|
|
|
|
|
{
|
|
|
|
|
Q800MachineState *ms = Q800_MACHINE(obj);
|
|
|
|
|
|
|
|
|
|
return ms->easc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void q800_set_easc(Object *obj, bool value, Error **errp)
|
|
|
|
|
{
|
|
|
|
|
Q800MachineState *ms = Q800_MACHINE(obj);
|
|
|
|
|
|
|
|
|
|
ms->easc = value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void q800_init(Object *obj)
|
|
|
|
|
{
|
|
|
|
|
Q800MachineState *ms = Q800_MACHINE(obj);
|
|
|
|
|
|
|
|
|
|
/* Default to EASC */
|
|
|
|
|
ms->easc = true;
|
|
|
|
|
}
|
|
|
|
|
|
2022-06-22 10:53:03 +00:00
|
|
|
static GlobalProperty hw_compat_q800[] = {
|
2023-06-21 08:53:30 +00:00
|
|
|
{ "scsi-hd", "quirk_mode_page_vendor_specific_apple", "on" },
|
2022-06-22 10:53:13 +00:00
|
|
|
{ "scsi-hd", "vendor", " SEAGATE" },
|
|
|
|
|
{ "scsi-hd", "product", " ST225N" },
|
|
|
|
|
{ "scsi-hd", "ver", "1.0 " },
|
2023-06-21 08:53:30 +00:00
|
|
|
{ "scsi-cd", "quirk_mode_page_apple_vendor", "on" },
|
|
|
|
|
{ "scsi-cd", "quirk_mode_sense_rom_use_dbd", "on" },
|
|
|
|
|
{ "scsi-cd", "quirk_mode_page_vendor_specific_apple", "on" },
|
|
|
|
|
{ "scsi-cd", "quirk_mode_page_truncated", "on" },
|
2022-06-22 10:53:14 +00:00
|
|
|
{ "scsi-cd", "vendor", "MATSHITA" },
|
|
|
|
|
{ "scsi-cd", "product", "CD-ROM CR-8005" },
|
|
|
|
|
{ "scsi-cd", "ver", "1.0k" },
|
2022-06-22 10:53:03 +00:00
|
|
|
};
|
|
|
|
|
static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
|
|
|
|
|
|
2019-10-26 16:45:45 +00:00
|
|
|
static void q800_machine_class_init(ObjectClass *oc, void *data)
|
|
|
|
|
{
|
2023-11-17 07:17:01 +00:00
|
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static const char * const valid_cpu_types[] = {
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M68K_CPU_TYPE_NAME("m68040"),
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NULL
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};
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2019-10-26 16:45:45 +00:00
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MachineClass *mc = MACHINE_CLASS(oc);
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2023-06-21 08:53:33 +00:00
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2019-10-26 16:45:45 +00:00
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mc->desc = "Macintosh Quadra 800";
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2023-06-21 08:53:33 +00:00
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mc->init = q800_machine_init;
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2019-10-26 16:45:45 +00:00
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mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
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2023-11-17 07:17:01 +00:00
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mc->valid_cpu_types = valid_cpu_types;
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2019-10-26 16:45:45 +00:00
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mc->max_cpus = 1;
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mc->block_default_type = IF_SCSI;
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2020-02-19 16:09:21 +00:00
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mc->default_ram_id = "m68k_mac.ram";
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2023-10-04 08:37:55 +00:00
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machine_add_audiodev_property(mc);
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2022-06-22 10:53:03 +00:00
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compat_props_add(mc->compat_props, hw_compat_q800, hw_compat_q800_len);
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2023-10-04 08:37:56 +00:00
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object_class_property_add_bool(oc, "easc", q800_get_easc, q800_set_easc);
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object_class_property_set_description(oc, "easc",
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"Set to off to use ASC rather than EASC");
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2019-10-26 16:45:45 +00:00
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}
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static const TypeInfo q800_machine_typeinfo = {
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.name = MACHINE_TYPE_NAME("q800"),
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.parent = TYPE_MACHINE,
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2023-10-04 08:37:56 +00:00
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.instance_init = q800_init,
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2023-06-21 08:53:32 +00:00
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.instance_size = sizeof(Q800MachineState),
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2019-10-26 16:45:45 +00:00
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.class_init = q800_machine_class_init,
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};
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static void q800_machine_register_types(void)
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{
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type_register_static(&q800_machine_typeinfo);
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}
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type_init(q800_machine_register_types)
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