2020-10-06 07:05:29 +00:00
|
|
|
/*
|
|
|
|
* Target-specific parts of the CPU object
|
|
|
|
*
|
|
|
|
* Copyright (c) 2003 Fabrice Bellard
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "qemu/osdep.h"
|
|
|
|
#include "qemu-common.h"
|
|
|
|
#include "qapi/error.h"
|
|
|
|
|
|
|
|
#include "exec/target_page.h"
|
|
|
|
#include "hw/qdev-core.h"
|
|
|
|
#include "hw/qdev-properties.h"
|
|
|
|
#include "qemu/error-report.h"
|
|
|
|
#include "migration/vmstate.h"
|
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
#include "qemu.h"
|
|
|
|
#else
|
2021-05-17 10:51:31 +00:00
|
|
|
#include "hw/core/sysemu-cpu-ops.h"
|
2020-10-06 07:05:29 +00:00
|
|
|
#include "exec/address-spaces.h"
|
|
|
|
#endif
|
|
|
|
#include "sysemu/tcg.h"
|
|
|
|
#include "sysemu/kvm.h"
|
|
|
|
#include "sysemu/replay.h"
|
2022-02-07 14:28:56 +00:00
|
|
|
#include "exec/exec-all.h"
|
2020-12-16 12:27:58 +00:00
|
|
|
#include "exec/translate-all.h"
|
2020-10-06 07:05:29 +00:00
|
|
|
#include "exec/log.h"
|
2021-03-22 13:27:41 +00:00
|
|
|
#include "hw/core/accel-cpu.h"
|
2021-07-01 15:10:53 +00:00
|
|
|
#include "trace/trace-root.h"
|
2022-02-07 14:28:56 +00:00
|
|
|
#include "qemu/accel.h"
|
2020-10-06 07:05:29 +00:00
|
|
|
|
|
|
|
uintptr_t qemu_host_page_size;
|
|
|
|
intptr_t qemu_host_page_mask;
|
|
|
|
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
static int cpu_common_post_load(void *opaque, int version_id)
|
|
|
|
{
|
|
|
|
CPUState *cpu = opaque;
|
|
|
|
|
|
|
|
/* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
|
|
|
|
version_id is increased. */
|
|
|
|
cpu->interrupt_request &= ~0x01;
|
|
|
|
tlb_flush(cpu);
|
|
|
|
|
|
|
|
/* loadvm has just updated the content of RAM, bypassing the
|
|
|
|
* usual mechanisms that ensure we flush TBs for writes to
|
|
|
|
* memory we've translated code from. So we must flush all TBs,
|
|
|
|
* which will now be stale.
|
|
|
|
*/
|
|
|
|
tb_flush(cpu);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int cpu_common_pre_load(void *opaque)
|
|
|
|
{
|
|
|
|
CPUState *cpu = opaque;
|
|
|
|
|
|
|
|
cpu->exception_index = -1;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool cpu_common_exception_index_needed(void *opaque)
|
|
|
|
{
|
|
|
|
CPUState *cpu = opaque;
|
|
|
|
|
|
|
|
return tcg_enabled() && cpu->exception_index != -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_cpu_common_exception_index = {
|
|
|
|
.name = "cpu_common/exception_index",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = cpu_common_exception_index_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_INT32(exception_index, CPUState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool cpu_common_crash_occurred_needed(void *opaque)
|
|
|
|
{
|
|
|
|
CPUState *cpu = opaque;
|
|
|
|
|
|
|
|
return cpu->crash_occurred;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const VMStateDescription vmstate_cpu_common_crash_occurred = {
|
|
|
|
.name = "cpu_common/crash_occurred",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.needed = cpu_common_crash_occurred_needed,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_BOOL(crash_occurred, CPUState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
|
|
|
const VMStateDescription vmstate_cpu_common = {
|
|
|
|
.name = "cpu_common",
|
|
|
|
.version_id = 1,
|
|
|
|
.minimum_version_id = 1,
|
|
|
|
.pre_load = cpu_common_pre_load,
|
|
|
|
.post_load = cpu_common_post_load,
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
VMSTATE_UINT32(halted, CPUState),
|
|
|
|
VMSTATE_UINT32(interrupt_request, CPUState),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
},
|
|
|
|
.subsections = (const VMStateDescription*[]) {
|
|
|
|
&vmstate_cpu_common_exception_index,
|
|
|
|
&vmstate_cpu_common_crash_occurred,
|
|
|
|
NULL
|
|
|
|
}
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2021-02-04 16:39:11 +00:00
|
|
|
void cpu_exec_realizefn(CPUState *cpu, Error **errp)
|
2020-10-06 07:05:29 +00:00
|
|
|
{
|
2021-05-17 10:51:32 +00:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2020-10-06 07:05:29 +00:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2021-05-17 10:51:32 +00:00
|
|
|
#endif
|
2020-10-06 07:05:29 +00:00
|
|
|
|
2021-02-04 16:39:11 +00:00
|
|
|
cpu_list_add(cpu);
|
2021-03-22 13:27:44 +00:00
|
|
|
if (!accel_cpu_realizefn(cpu, errp)) {
|
|
|
|
return;
|
|
|
|
}
|
2021-02-04 16:39:11 +00:00
|
|
|
/* NB: errp parameter is unused currently */
|
|
|
|
if (tcg_enabled()) {
|
|
|
|
tcg_exec_realizefn(cpu, errp);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_USER_ONLY
|
2021-05-17 10:51:28 +00:00
|
|
|
assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
|
|
|
|
qdev_get_vmsd(DEVICE(cpu))->unmigratable);
|
2021-02-04 16:39:11 +00:00
|
|
|
#else
|
|
|
|
if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
|
|
|
|
vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
|
|
|
|
}
|
2021-05-17 10:51:32 +00:00
|
|
|
if (cc->sysemu_ops->legacy_vmsd != NULL) {
|
|
|
|
vmstate_register(NULL, cpu->cpu_index, cc->sysemu_ops->legacy_vmsd, cpu);
|
2021-02-04 16:39:11 +00:00
|
|
|
}
|
|
|
|
#endif /* CONFIG_USER_ONLY */
|
|
|
|
}
|
|
|
|
|
|
|
|
void cpu_exec_unrealizefn(CPUState *cpu)
|
|
|
|
{
|
2021-05-17 10:51:32 +00:00
|
|
|
#ifndef CONFIG_USER_ONLY
|
2021-02-04 16:39:11 +00:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2020-10-06 07:05:29 +00:00
|
|
|
|
2021-05-17 10:51:32 +00:00
|
|
|
if (cc->sysemu_ops->legacy_vmsd != NULL) {
|
|
|
|
vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
|
2020-10-06 07:05:29 +00:00
|
|
|
}
|
|
|
|
if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
|
|
|
|
vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
|
|
|
|
}
|
|
|
|
#endif
|
2021-02-04 16:39:11 +00:00
|
|
|
if (tcg_enabled()) {
|
|
|
|
tcg_exec_unrealizefn(cpu);
|
|
|
|
}
|
|
|
|
|
|
|
|
cpu_list_remove(cpu);
|
2020-10-06 07:05:29 +00:00
|
|
|
}
|
|
|
|
|
2021-12-27 15:01:24 +00:00
|
|
|
/*
|
|
|
|
* This can't go in hw/core/cpu.c because that file is compiled only
|
|
|
|
* once for both user-mode and system builds.
|
|
|
|
*/
|
2021-08-22 07:25:28 +00:00
|
|
|
static Property cpu_common_props[] = {
|
2021-12-27 15:01:24 +00:00
|
|
|
#ifdef CONFIG_USER_ONLY
|
|
|
|
/*
|
|
|
|
* Create a property for the user-only object, so users can
|
|
|
|
* adjust prctl(PR_SET_UNALIGN) from the command-line.
|
|
|
|
* Has no effect if the target does not support the feature.
|
|
|
|
*/
|
|
|
|
DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
|
|
|
|
prctl_unalign_sigbus, false),
|
|
|
|
#else
|
2021-08-22 07:25:28 +00:00
|
|
|
/*
|
2021-12-27 15:01:24 +00:00
|
|
|
* Create a memory property for softmmu CPU object, so users can
|
|
|
|
* wire up its memory. The default if no link is set up is to use
|
2021-08-22 07:25:28 +00:00
|
|
|
* the system address space.
|
|
|
|
*/
|
|
|
|
DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
|
|
|
|
MemoryRegion *),
|
|
|
|
#endif
|
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
|
};
|
|
|
|
|
2022-01-27 15:46:25 +00:00
|
|
|
static bool cpu_get_start_powered_off(Object *obj, Error **errp)
|
|
|
|
{
|
|
|
|
CPUState *cpu = CPU(obj);
|
|
|
|
return cpu->start_powered_off;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
|
|
|
|
{
|
|
|
|
CPUState *cpu = CPU(obj);
|
|
|
|
cpu->start_powered_off = value;
|
|
|
|
}
|
|
|
|
|
2021-08-22 07:25:28 +00:00
|
|
|
void cpu_class_init_props(DeviceClass *dc)
|
|
|
|
{
|
2022-01-27 15:46:25 +00:00
|
|
|
ObjectClass *oc = OBJECT_CLASS(dc);
|
|
|
|
|
2021-08-22 07:25:28 +00:00
|
|
|
device_class_set_props(dc, cpu_common_props);
|
2022-01-27 15:46:25 +00:00
|
|
|
/*
|
|
|
|
* We can't use DEFINE_PROP_BOOL in the Property array for this
|
|
|
|
* property, because we want this to be settable after realize.
|
|
|
|
*/
|
|
|
|
object_class_property_add_bool(oc, "start-powered-off",
|
|
|
|
cpu_get_start_powered_off,
|
|
|
|
cpu_set_start_powered_off);
|
2021-08-22 07:25:28 +00:00
|
|
|
}
|
|
|
|
|
2020-10-06 07:05:29 +00:00
|
|
|
void cpu_exec_initfn(CPUState *cpu)
|
|
|
|
{
|
|
|
|
cpu->as = NULL;
|
|
|
|
cpu->num_ases = 0;
|
|
|
|
|
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
|
cpu->thread_id = qemu_get_thread_id();
|
|
|
|
cpu->memory = get_system_memory();
|
|
|
|
object_ref(OBJECT(cpu->memory));
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
const char *parse_cpu_option(const char *cpu_option)
|
|
|
|
{
|
|
|
|
ObjectClass *oc;
|
|
|
|
CPUClass *cc;
|
|
|
|
gchar **model_pieces;
|
|
|
|
const char *cpu_type;
|
|
|
|
|
|
|
|
model_pieces = g_strsplit(cpu_option, ",", 2);
|
|
|
|
if (!model_pieces[0]) {
|
|
|
|
error_report("-cpu option cannot be empty");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
|
|
|
|
if (oc == NULL) {
|
|
|
|
error_report("unable to find CPU model '%s'", model_pieces[0]);
|
|
|
|
g_strfreev(model_pieces);
|
|
|
|
exit(EXIT_FAILURE);
|
|
|
|
}
|
|
|
|
|
|
|
|
cpu_type = object_class_get_name(oc);
|
|
|
|
cc = CPU_CLASS(oc);
|
|
|
|
cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
|
|
|
|
g_strfreev(model_pieces);
|
|
|
|
return cpu_type;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
void tb_invalidate_phys_addr(target_ulong addr)
|
|
|
|
{
|
|
|
|
mmap_lock();
|
|
|
|
tb_invalidate_phys_page_range(addr, addr + 1);
|
|
|
|
mmap_unlock();
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
|
|
|
|
{
|
|
|
|
ram_addr_t ram_addr;
|
|
|
|
MemoryRegion *mr;
|
|
|
|
hwaddr l = 1;
|
|
|
|
|
|
|
|
if (!tcg_enabled()) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
RCU_READ_LOCK_GUARD();
|
|
|
|
mr = address_space_translate(as, addr, &addr, &l, false, attrs);
|
|
|
|
if (!(memory_region_is_ram(mr)
|
|
|
|
|| memory_region_is_romd(mr))) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
ram_addr = memory_region_get_ram_addr(mr) + addr;
|
|
|
|
tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Add a breakpoint. */
|
|
|
|
int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
|
|
|
|
CPUBreakpoint **breakpoint)
|
|
|
|
{
|
2021-07-20 15:47:23 +00:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2020-10-06 07:05:29 +00:00
|
|
|
CPUBreakpoint *bp;
|
|
|
|
|
2021-07-20 15:47:23 +00:00
|
|
|
if (cc->gdb_adjust_breakpoint) {
|
|
|
|
pc = cc->gdb_adjust_breakpoint(cpu, pc);
|
|
|
|
}
|
|
|
|
|
2020-10-06 07:05:29 +00:00
|
|
|
bp = g_malloc(sizeof(*bp));
|
|
|
|
|
|
|
|
bp->pc = pc;
|
|
|
|
bp->flags = flags;
|
|
|
|
|
|
|
|
/* keep all GDB-injected breakpoints in front */
|
|
|
|
if (flags & BP_GDB) {
|
|
|
|
QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
|
|
|
|
} else {
|
|
|
|
QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (breakpoint) {
|
|
|
|
*breakpoint = bp;
|
|
|
|
}
|
2021-07-01 15:10:53 +00:00
|
|
|
|
|
|
|
trace_breakpoint_insert(cpu->cpu_index, pc, flags);
|
2020-10-06 07:05:29 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Remove a specific breakpoint. */
|
|
|
|
int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
|
|
|
|
{
|
2021-07-20 15:47:23 +00:00
|
|
|
CPUClass *cc = CPU_GET_CLASS(cpu);
|
2020-10-06 07:05:29 +00:00
|
|
|
CPUBreakpoint *bp;
|
|
|
|
|
2021-07-20 15:47:23 +00:00
|
|
|
if (cc->gdb_adjust_breakpoint) {
|
|
|
|
pc = cc->gdb_adjust_breakpoint(cpu, pc);
|
|
|
|
}
|
|
|
|
|
2020-10-06 07:05:29 +00:00
|
|
|
QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
|
|
|
|
if (bp->pc == pc && bp->flags == flags) {
|
|
|
|
cpu_breakpoint_remove_by_ref(cpu, bp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return -ENOENT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Remove a specific breakpoint by reference. */
|
2021-07-01 15:10:53 +00:00
|
|
|
void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
|
2020-10-06 07:05:29 +00:00
|
|
|
{
|
2021-07-01 15:10:53 +00:00
|
|
|
QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
|
2020-10-06 07:05:29 +00:00
|
|
|
|
2021-07-01 15:10:53 +00:00
|
|
|
trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
|
|
|
|
g_free(bp);
|
2020-10-06 07:05:29 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Remove all matching breakpoints. */
|
|
|
|
void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
|
|
|
|
{
|
|
|
|
CPUBreakpoint *bp, *next;
|
|
|
|
|
|
|
|
QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
|
|
|
|
if (bp->flags & mask) {
|
|
|
|
cpu_breakpoint_remove_by_ref(cpu, bp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* enable or disable single step mode. EXCP_DEBUG is returned by the
|
|
|
|
CPU loop after each instruction */
|
|
|
|
void cpu_single_step(CPUState *cpu, int enabled)
|
|
|
|
{
|
|
|
|
if (cpu->singlestep_enabled != enabled) {
|
|
|
|
cpu->singlestep_enabled = enabled;
|
|
|
|
if (kvm_enabled()) {
|
|
|
|
kvm_update_guest_debug(cpu, 0);
|
|
|
|
}
|
2021-07-01 15:10:53 +00:00
|
|
|
trace_breakpoint_singlestep(cpu->cpu_index, enabled);
|
2020-10-06 07:05:29 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void cpu_abort(CPUState *cpu, const char *fmt, ...)
|
|
|
|
{
|
|
|
|
va_list ap;
|
|
|
|
va_list ap2;
|
|
|
|
|
|
|
|
va_start(ap, fmt);
|
|
|
|
va_copy(ap2, ap);
|
|
|
|
fprintf(stderr, "qemu: fatal: ");
|
|
|
|
vfprintf(stderr, fmt, ap);
|
|
|
|
fprintf(stderr, "\n");
|
|
|
|
cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
|
|
|
|
if (qemu_log_separate()) {
|
|
|
|
FILE *logfile = qemu_log_lock();
|
|
|
|
qemu_log("qemu: fatal: ");
|
|
|
|
qemu_log_vprintf(fmt, ap2);
|
|
|
|
qemu_log("\n");
|
|
|
|
log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
|
|
|
|
qemu_log_flush();
|
|
|
|
qemu_log_unlock(logfile);
|
|
|
|
qemu_log_close();
|
|
|
|
}
|
|
|
|
va_end(ap2);
|
|
|
|
va_end(ap);
|
|
|
|
replay_finish();
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
{
|
|
|
|
struct sigaction act;
|
|
|
|
sigfillset(&act.sa_mask);
|
|
|
|
act.sa_handler = SIG_DFL;
|
|
|
|
act.sa_flags = 0;
|
|
|
|
sigaction(SIGABRT, &act, NULL);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
abort();
|
|
|
|
}
|
|
|
|
|
|
|
|
/* physical memory access (slow version, mainly for debug) */
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
2022-02-03 01:13:28 +00:00
|
|
|
int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
|
|
|
|
void *ptr, size_t len, bool is_write)
|
2020-10-06 07:05:29 +00:00
|
|
|
{
|
|
|
|
int flags;
|
2022-02-03 01:13:28 +00:00
|
|
|
vaddr l, page;
|
2020-10-06 07:05:29 +00:00
|
|
|
void * p;
|
|
|
|
uint8_t *buf = ptr;
|
|
|
|
|
|
|
|
while (len > 0) {
|
|
|
|
page = addr & TARGET_PAGE_MASK;
|
|
|
|
l = (page + TARGET_PAGE_SIZE) - addr;
|
|
|
|
if (l > len)
|
|
|
|
l = len;
|
|
|
|
flags = page_get_flags(page);
|
|
|
|
if (!(flags & PAGE_VALID))
|
|
|
|
return -1;
|
|
|
|
if (is_write) {
|
|
|
|
if (!(flags & PAGE_WRITE))
|
|
|
|
return -1;
|
|
|
|
/* XXX: this code should not depend on lock_user */
|
|
|
|
if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
|
|
|
|
return -1;
|
|
|
|
memcpy(p, buf, l);
|
|
|
|
unlock_user(p, addr, l);
|
|
|
|
} else {
|
|
|
|
if (!(flags & PAGE_READ))
|
|
|
|
return -1;
|
|
|
|
/* XXX: this code should not depend on lock_user */
|
|
|
|
if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
|
|
|
|
return -1;
|
|
|
|
memcpy(buf, p, l);
|
|
|
|
unlock_user(p, addr, 0);
|
|
|
|
}
|
|
|
|
len -= l;
|
|
|
|
buf += l;
|
|
|
|
addr += l;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
bool target_words_bigendian(void)
|
|
|
|
{
|
|
|
|
#if defined(TARGET_WORDS_BIGENDIAN)
|
|
|
|
return true;
|
|
|
|
#else
|
|
|
|
return false;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void page_size_init(void)
|
|
|
|
{
|
|
|
|
/* NOTE: we can always suppose that qemu_host_page_size >=
|
|
|
|
TARGET_PAGE_SIZE */
|
|
|
|
if (qemu_host_page_size == 0) {
|
|
|
|
qemu_host_page_size = qemu_real_host_page_size;
|
|
|
|
}
|
|
|
|
if (qemu_host_page_size < TARGET_PAGE_SIZE) {
|
|
|
|
qemu_host_page_size = TARGET_PAGE_SIZE;
|
|
|
|
}
|
|
|
|
qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
|
|
|
|
}
|