linux/arch/arm/boot/dts/omap3-igep.dtsi
Nishanth Menon 1e633d713b ARM: dts: OMAP34xx/35xx: Add CPU OPP table
Add DT OPP table for OMAP34xx/35xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.

OPP data here is based on existing opp3xxx_data.c

Since the omap36xx OPP tables would be different from OMAP34xx/35xx,
introduce an new omap34xx.dtsi for 34xx/35xx specific entries and use
existing omap3.dtsi as the common dtsi file for all OMAP3 platforms.

This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp3xxx_data.c.

Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-04-09 00:21:23 +02:00

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/*
* Device Tree Source for IGEP Technology devices
*
* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "omap34xx.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
sound {
compatible = "ti,omap-twl4030";
ti,model = "igep2";
ti,mcbsp = <&mcbsp2>;
ti,codec = <&twl_audio>;
};
};
&omap3_pmx_core {
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x152 0x100 /* uart1_rx.uart1_rx INPUT | MODE0 */
0x14c 0 /* uart1_tx.uart1_tx OUTPUT | MODE0 */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0x14a 0x100 /* uart2_rx.uart2_rx INPUT | MODE0 */
0x148 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x16e 0x100 /* uart3_rx.uart3_rx INPUT | MODE0 */
0x170 0 /* uart3_tx.uart3_tx OUTPUT | MODE0 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x114 0x0118 /* sdmmc1_clk.sdmmc1_clk INPUT PULLUP | MODE 0 */
0x116 0x0118 /* sdmmc1_cmd.sdmmc1_cmd INPUT PULLUP | MODE 0 */
0x118 0x0118 /* sdmmc1_dat0.sdmmc1_dat0 INPUT PULLUP | MODE 0 */
0x11a 0x0118 /* sdmmc1_dat1.sdmmc1_dat1 INPUT PULLUP | MODE 0 */
0x11c 0x0118 /* sdmmc1_dat2.sdmmc1_dat2 INPUT PULLUP | MODE 0 */
0x11e 0x0118 /* sdmmc1_dat3.sdmmc1_dat3 INPUT PULLUP | MODE 0 */
0x120 0x0100 /* sdmmc1_dat4.sdmmc1_dat4 INPUT | MODE 0 */
0x122 0x0100 /* sdmmc1_dat5.sdmmc1_dat5 INPUT | MODE 0 */
0x124 0x0100 /* sdmmc1_dat6.sdmmc1_dat6 INPUT | MODE 0 */
0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */
>;
};
};
&i2c1 {
clock-frequency = <2600000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
twl_audio: audio {
compatible = "ti,twl4030-audio";
codec {
};
};
};
};
/include/ "twl4030.dtsi"
&i2c2 {
clock-frequency = <400000>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vmmc1>;
vmmc_aux-supply = <&vsim>;
bus-width = <8>;
};
&mmc2 {
status = "disabled";
};
&mmc3 {
status = "disabled";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&twl_gpio {
ti,use-leds;
};