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059289b260
This patch adds Device Tree file for the CoreTile Express A15x2 (V2P-CA15) with Test Chip 1. As the chip's GIC has 160 interrupt inputs and equivalent SMM (FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is increased. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
10 lines
320 B
Clojure
10 lines
320 B
Clojure
# Those numbers are used only by the non-DT V2P-CA9 platform
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# The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y
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zreladdr-y += 0x60008000
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params_phys-y := 0x60000100
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initrd_phys-y := 0x60800000
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dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \
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vexpress-v2p-ca9.dtb \
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vexpress-v2p-ca15-tc1.dtb
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