Hugo Villeneuve f161cea5a2 arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay ... While testing the ethernet interface on a Variscite symphony carrier board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware configuration), the ethernet PHY is not detected. The ADIN1300 datasheet indicate that the "Management interface active (t4)" state is reached at most 5ms after the reset signal is deasserted. The device tree in Variscite custom git repository uses the following property: phy-reset-post-delay = <20>; Add a new MDIO property 'reset-deassert-us' of 20ms to have the same delay inside the ethphy node. Adding this property fixes the problem with the PHY detection. Note that this SOM can also have an Atheros AR8033 PHY. In this case, a 1ms deassert delay is sufficient. Add a comment to that effect. Fixes: ade0176dd8 ("arm64: dts: imx8mn-var-som: Add Variscite VAR-SOM-MX8MN System on Module") Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2023-05-14 20:56:19 +08:00
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dts	arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay	2023-05-14 20:56:19 +08:00
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install.sh
Makefile	efi/zboot: arm64: Inject kernel code size symbol into the zboot payload	2023-04-26 18:01:41 +02:00