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efc91ae43c
Add driver code for the SiFive FU740 PRCI IP block. This IP block handles reset and clock control for the SiFive FU740 device and implements SoC-level clock tree controls and dividers. The link of unmatched as follow, and the U740-C000 manual would be present in the same page as soon. https://www.sifive.com/boards/hifive-unmatched This driver contains bug fixes and contributions from Henry Styles <hes@sifive.com> Erik Danie <erik.danie@sifive.com> Pragnesh Patel <pragnesh.patel@sifive.com> Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Pragnesh Patel <Pragnesh.patel@sifive.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Cc: Henry Styles <hes@sifive.com> Cc: Erik Danie <erik.danie@sifive.com> Cc: Pragnesh Patel <pragnesh.patel@sifive.com> Link: https://lore.kernel.org/r/20201209094916.17383-4-zong.li@sifive.com [sboyd@kernel.org: Include header to silence sparse] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
20 lines
479 B
Plaintext
20 lines
479 B
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menuconfig CLK_SIFIVE
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bool "SiFive SoC driver support"
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depends on RISCV || COMPILE_TEST
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help
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SoC drivers for SiFive Linux-capable SoCs.
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if CLK_SIFIVE
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config CLK_SIFIVE_PRCI
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bool "PRCI driver for SiFive SoCs"
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select CLK_ANALOGBITS_WRPLL_CLN28HPC
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help
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Supports the Power Reset Clock interface (PRCI) IP block found in
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FU540/FU740 SoCs. If this kernel is meant to run on a SiFive FU540/
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FU740 SoCs, enable this driver.
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endif
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