mirror of
https://github.com/torvalds/linux
synced 2024-10-17 08:46:50 +00:00
485734f3fc
We already build the swiotlb code for 32-bit kernels with PAE support, but the code to actually use swiotlb has only been enabled for 64-bit kernels for an unknown reason. Before Linux v4.18 we paper over this fact because the networking code, the SCSI layer and some random block drivers implemented their own bounce buffering scheme. [ mingo: Changelog fixes. ] Fixes:21e07dba9f("scsi: reduce use of block bounce buffers") Fixes:ab74cfebaf("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") Reported-by: Matthew Whitehead <tedheadster@gmail.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Matthew Whitehead <tedheadster@gmail.com> Cc: konrad.wilk@oracle.com Cc: iommu@lists.linux-foundation.org Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
82 lines
1.8 KiB
C
82 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/* Glue code to lib/swiotlb.c */
|
|
|
|
#include <linux/pci.h>
|
|
#include <linux/cache.h>
|
|
#include <linux/init.h>
|
|
#include <linux/swiotlb.h>
|
|
#include <linux/bootmem.h>
|
|
#include <linux/dma-direct.h>
|
|
#include <linux/mem_encrypt.h>
|
|
|
|
#include <asm/iommu.h>
|
|
#include <asm/swiotlb.h>
|
|
#include <asm/dma.h>
|
|
#include <asm/xen/swiotlb-xen.h>
|
|
#include <asm/iommu_table.h>
|
|
|
|
int swiotlb __read_mostly;
|
|
|
|
/*
|
|
* pci_swiotlb_detect_override - set swiotlb to 1 if necessary
|
|
*
|
|
* This returns non-zero if we are forced to use swiotlb (by the boot
|
|
* option).
|
|
*/
|
|
int __init pci_swiotlb_detect_override(void)
|
|
{
|
|
if (swiotlb_force == SWIOTLB_FORCE)
|
|
swiotlb = 1;
|
|
|
|
return swiotlb;
|
|
}
|
|
IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
|
|
pci_xen_swiotlb_detect,
|
|
pci_swiotlb_init,
|
|
pci_swiotlb_late_init);
|
|
|
|
/*
|
|
* If 4GB or more detected (and iommu=off not set) or if SME is active
|
|
* then set swiotlb to 1 and return 1.
|
|
*/
|
|
int __init pci_swiotlb_detect_4gb(void)
|
|
{
|
|
/* don't initialize swiotlb if iommu=off (no_iommu=1) */
|
|
if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
|
|
swiotlb = 1;
|
|
|
|
/*
|
|
* If SME is active then swiotlb will be set to 1 so that bounce
|
|
* buffers are allocated and used for devices that do not support
|
|
* the addressing range required for the encryption mask.
|
|
*/
|
|
if (sme_active())
|
|
swiotlb = 1;
|
|
|
|
return swiotlb;
|
|
}
|
|
IOMMU_INIT(pci_swiotlb_detect_4gb,
|
|
pci_swiotlb_detect_override,
|
|
pci_swiotlb_init,
|
|
pci_swiotlb_late_init);
|
|
|
|
void __init pci_swiotlb_init(void)
|
|
{
|
|
if (swiotlb) {
|
|
swiotlb_init(0);
|
|
dma_ops = &swiotlb_dma_ops;
|
|
}
|
|
}
|
|
|
|
void __init pci_swiotlb_late_init(void)
|
|
{
|
|
/* An IOMMU turned us off. */
|
|
if (!swiotlb)
|
|
swiotlb_exit();
|
|
else {
|
|
printk(KERN_INFO "PCI-DMA: "
|
|
"Using software bounce buffering for IO (SWIOTLB)\n");
|
|
swiotlb_print_info();
|
|
}
|
|
}
|