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e1ced09797
Some initialization errors are reported with the existing OCTEON EDAC support patch. Also some parts have more than one memory controller. Fix the errors and add multiple controllers if present. Signed-off-by: David Daney <david.daney@cavium.com>
112 lines
2.8 KiB
C
112 lines
2.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 Cavium, Inc.
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/edac.h>
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-npi-defs.h>
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#include <asm/octeon/cvmx-pci-defs.h>
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#include <asm/octeon/octeon.h>
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#include "edac_core.h"
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#include "edac_module.h"
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static void octeon_pci_poll(struct edac_pci_ctl_info *pci)
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{
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union cvmx_pci_cfg01 cfg01;
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cfg01.u32 = octeon_npi_read32(CVMX_NPI_PCI_CFG01);
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if (cfg01.s.dpe) { /* Detected parity error */
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edac_pci_handle_pe(pci, pci->ctl_name);
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cfg01.s.dpe = 1; /* Reset */
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octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
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}
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if (cfg01.s.sse) {
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edac_pci_handle_npe(pci, "Signaled System Error");
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cfg01.s.sse = 1; /* Reset */
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octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
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}
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if (cfg01.s.rma) {
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edac_pci_handle_npe(pci, "Received Master Abort");
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cfg01.s.rma = 1; /* Reset */
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octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
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}
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if (cfg01.s.rta) {
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edac_pci_handle_npe(pci, "Received Target Abort");
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cfg01.s.rta = 1; /* Reset */
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octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
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}
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if (cfg01.s.sta) {
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edac_pci_handle_npe(pci, "Signaled Target Abort");
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cfg01.s.sta = 1; /* Reset */
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octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
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}
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if (cfg01.s.mdpe) {
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edac_pci_handle_npe(pci, "Master Data Parity Error");
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cfg01.s.mdpe = 1; /* Reset */
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octeon_npi_write32(CVMX_NPI_PCI_CFG01, cfg01.u32);
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}
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}
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static int __devinit octeon_pci_probe(struct platform_device *pdev)
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{
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struct edac_pci_ctl_info *pci;
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int res = 0;
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pci = edac_pci_alloc_ctl_info(0, "octeon_pci_err");
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if (!pci)
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return -ENOMEM;
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pci->dev = &pdev->dev;
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platform_set_drvdata(pdev, pci);
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pci->dev_name = dev_name(&pdev->dev);
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pci->mod_name = "octeon-pci";
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pci->ctl_name = "octeon_pci_err";
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pci->edac_check = octeon_pci_poll;
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if (edac_pci_add_device(pci, 0) > 0) {
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pr_err("%s: edac_pci_add_device() failed\n", __func__);
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goto err;
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}
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return 0;
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err:
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edac_pci_free_ctl_info(pci);
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return res;
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}
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static int octeon_pci_remove(struct platform_device *pdev)
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{
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struct edac_pci_ctl_info *pci = platform_get_drvdata(pdev);
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edac_pci_del_device(&pdev->dev);
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edac_pci_free_ctl_info(pci);
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return 0;
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}
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static struct platform_driver octeon_pci_driver = {
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.probe = octeon_pci_probe,
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.remove = octeon_pci_remove,
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.driver = {
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.name = "octeon_pci_edac",
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}
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};
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module_platform_driver(octeon_pci_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
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