mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
129 lines
2.4 KiB
C
129 lines
2.4 KiB
C
/*
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* linux/arch/mips/tx4938/common/prom.c
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*
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* common tx4938 memory interface
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* Copyright (C) 2000-2001 Toshiba Corporation
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*
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* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
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*/
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/bootmem.h>
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#include <asm/addrspace.h>
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#include <asm/bootinfo.h>
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#include <asm/tx4938/tx4938.h>
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static unsigned int __init
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tx4938_process_sdccr(u64 * addr)
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{
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u64 val;
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unsigned int sdccr_ce;
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unsigned int sdccr_rs;
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unsigned int sdccr_cs;
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unsigned int sdccr_mw;
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unsigned int rs = 0;
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unsigned int cs = 0;
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unsigned int mw = 0;
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unsigned int bc = 4;
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unsigned int msize = 0;
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val = (*((vu64 *) (addr)));
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/* MVMCP -- need #defs for these bits masks */
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sdccr_ce = ((val & (1 << 10)) >> 10);
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sdccr_rs = ((val & (3 << 5)) >> 5);
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sdccr_cs = ((val & (7 << 2)) >> 2);
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sdccr_mw = ((val & (1 << 0)) >> 0);
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if (sdccr_ce) {
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switch (sdccr_rs) {
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case 0:{
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rs = 2048;
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break;
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}
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case 1:{
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rs = 4096;
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break;
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}
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case 2:{
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rs = 8192;
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break;
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}
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default:{
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rs = 0;
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break;
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}
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}
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switch (sdccr_cs) {
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case 0:{
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cs = 256;
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break;
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}
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case 1:{
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cs = 512;
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break;
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}
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case 2:{
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cs = 1024;
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break;
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}
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case 3:{
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cs = 2048;
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break;
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}
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case 4:{
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cs = 4096;
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break;
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}
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default:{
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cs = 0;
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break;
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}
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}
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switch (sdccr_mw) {
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case 0:{
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mw = 8;
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break;
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} /* 8 bytes = 64 bits */
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case 1:{
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mw = 4;
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break;
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} /* 4 bytes = 32 bits */
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}
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}
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/* bytes per chip MB per chip bank count */
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msize = (((rs * cs * mw) / (1024 * 1024)) * (bc));
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/* MVMCP -- bc hard coded to 4 from table 9.3.1 */
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/* boad supports bc=2 but no way to detect */
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return (msize);
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}
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unsigned int __init
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tx4938_get_mem_size(void)
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{
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unsigned int c0;
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unsigned int c1;
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unsigned int c2;
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unsigned int c3;
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unsigned int total;
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/* MVMCP -- need #defs for these registers */
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c0 = tx4938_process_sdccr((u64 *) 0xff1f8000);
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c1 = tx4938_process_sdccr((u64 *) 0xff1f8008);
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c2 = tx4938_process_sdccr((u64 *) 0xff1f8010);
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c3 = tx4938_process_sdccr((u64 *) 0xff1f8018);
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total = c0 + c1 + c2 + c3;
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return (total);
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}
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