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08c590409f
It adds QoS support for QNOC type device which can be found on QCM2290 platform. The downstream driver[1] includes support for priority, limiter, regulator and forwarding setup. As QCM2290 support only requires priority and forwarding configuration, limiter and regulator support are omitted for this initial submission. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.19/tree/drivers/soc/qcom/msm_bus/msm_bus_qnoc_adhoc.c?h=kernel.lnx.4.19.r22-rel Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20211215002324.1727-3-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
103 lines
2.7 KiB
C
103 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Linaro Ltd
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*/
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#ifndef __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H
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#define __DRIVERS_INTERCONNECT_QCOM_ICC_RPM_H
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#define RPM_BUS_MASTER_REQ 0x73616d62
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#define RPM_BUS_SLAVE_REQ 0x766c7362
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#define to_qcom_provider(_provider) \
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container_of(_provider, struct qcom_icc_provider, provider)
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enum qcom_icc_type {
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QCOM_ICC_NOC,
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QCOM_ICC_BIMC,
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QCOM_ICC_QNOC,
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};
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/**
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* struct qcom_icc_provider - Qualcomm specific interconnect provider
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* @provider: generic interconnect provider
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* @bus_clks: the clk_bulk_data table of bus clocks
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* @num_clks: the total number of clk_bulk_data entries
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* @type: the ICC provider type
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* @qos_offset: offset to QoS registers
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* @regmap: regmap for QoS registers read/write access
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*/
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struct qcom_icc_provider {
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struct icc_provider provider;
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int num_clks;
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enum qcom_icc_type type;
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struct regmap *regmap;
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unsigned int qos_offset;
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struct clk_bulk_data bus_clks[];
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};
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/**
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* struct qcom_icc_qos - Qualcomm specific interconnect QoS parameters
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* @areq_prio: node requests priority
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* @prio_level: priority level for bus communication
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* @limit_commands: activate/deactivate limiter mode during runtime
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* @ap_owned: indicates if the node is owned by the AP or by the RPM
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* @qos_mode: default qos mode for this node
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* @qos_port: qos port number for finding qos registers of this node
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* @urg_fwd_en: enable urgent forwarding
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*/
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struct qcom_icc_qos {
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u32 areq_prio;
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u32 prio_level;
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bool limit_commands;
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bool ap_owned;
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int qos_mode;
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int qos_port;
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bool urg_fwd_en;
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};
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/**
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* struct qcom_icc_node - Qualcomm specific interconnect nodes
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* @name: the node name used in debugfs
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* @id: a unique node identifier
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* @links: an array of nodes where we can go next while traversing
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* @num_links: the total number of @links
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* @buswidth: width of the interconnect between a node and the bus (bytes)
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* @mas_rpm_id: RPM id for devices that are bus masters
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* @slv_rpm_id: RPM id for devices that are bus slaves
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* @qos: NoC QoS setting parameters
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* @rate: current bus clock rate in Hz
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*/
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struct qcom_icc_node {
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unsigned char *name;
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u16 id;
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const u16 *links;
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u16 num_links;
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u16 buswidth;
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int mas_rpm_id;
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int slv_rpm_id;
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struct qcom_icc_qos qos;
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u64 rate;
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};
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struct qcom_icc_desc {
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struct qcom_icc_node **nodes;
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size_t num_nodes;
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const char * const *clocks;
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size_t num_clocks;
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bool has_bus_pd;
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enum qcom_icc_type type;
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const struct regmap_config *regmap_cfg;
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unsigned int qos_offset;
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};
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/* Valid for both NoC and BIMC */
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#define NOC_QOS_MODE_INVALID -1
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#define NOC_QOS_MODE_FIXED 0x0
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#define NOC_QOS_MODE_BYPASS 0x2
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int qnoc_probe(struct platform_device *pdev);
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int qnoc_remove(struct platform_device *pdev);
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#endif
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