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89ef42088b
Currently we only support configuration for number of channels and sample rate. Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Link: https://lore.kernel.org/r/20231109135900.88310-3-daniel.baluta@oss.nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/*
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* Copyright 2019 NXP
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*
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* Author: Daniel Baluta <daniel.baluta@nxp.com>
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*/
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#ifndef __INCLUDE_SOUND_SOF_DAI_IMX_H__
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#define __INCLUDE_SOUND_SOF_DAI_IMX_H__
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#include <sound/sof/header.h>
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/* ESAI Configuration Request - SOF_IPC_DAI_ESAI_CONFIG */
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struct sof_ipc_dai_esai_params {
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struct sof_ipc_hdr hdr;
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/* MCLK */
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uint16_t reserved1;
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uint16_t mclk_id;
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uint32_t mclk_direction;
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uint32_t mclk_rate; /* MCLK frequency in Hz */
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uint32_t fsync_rate; /* FSYNC frequency in Hz */
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uint32_t bclk_rate; /* BCLK frequency in Hz */
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/* TDM */
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uint32_t tdm_slots;
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uint32_t rx_slots;
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uint32_t tx_slots;
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uint16_t tdm_slot_width;
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uint16_t reserved2; /* alignment */
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} __packed;
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/* SAI Configuration Request - SOF_IPC_DAI_SAI_CONFIG */
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struct sof_ipc_dai_sai_params {
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struct sof_ipc_hdr hdr;
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/* MCLK */
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uint16_t reserved1;
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uint16_t mclk_id;
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uint32_t mclk_direction;
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uint32_t mclk_rate; /* MCLK frequency in Hz */
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uint32_t fsync_rate; /* FSYNC frequency in Hz */
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uint32_t bclk_rate; /* BCLK frequency in Hz */
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/* TDM */
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uint32_t tdm_slots;
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uint32_t rx_slots;
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uint32_t tx_slots;
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uint16_t tdm_slot_width;
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uint16_t reserved2; /* alignment */
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} __packed;
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/* MICFIL Configuration Request - SOF_IPC_DAI_MICFIL_CONFIG */
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struct sof_ipc_dai_micfil_params {
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uint32_t pdm_rate;
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uint32_t pdm_ch;
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} __packed;
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#endif
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