linux/drivers/clk/hisilicon
Stephen Boyd 5816b74581 Merge branches 'clk-hisi', 'clk-lochnagar', 'clk-allwinner', 'clk-rockchip' and 'clk-qoriq' into clk-next
- Mark UFS clk as critical on Hi-Silicon hi3660 SoCs
 - Support for Cirrus Logic Lochnagar clks

* clk-hisi:
  clk: hi3660: Mark clk_gate_ufs_subsys as critical

* clk-lochnagar:
  clk: lochnagar: Add support for the Cirrus Logic Lochnagar
  clk: lochnagar: Add initial binding documentation

* clk-allwinner:
  clk: sunxi-ng: sun5i: Export the MBUS clock
  clk: sunxi-ng: a83t: Add pll-video0 as parent of csi-mclk
  clk: sunxi-ng: h6: Allow video & vpu clocks to change parent rate
  clk: sunxi-ng: h6: Preset hdmi-cec clock parent
  clk: sunxi: Add Kconfig options
  clk: sunxi-ng: f1c100s: fix USB PHY gate bit offset
  clk: sunxi-ng: Allow DE clock to set parent rate

* clk-rockchip:
  clk: rockchip: undo several noc and special clocks as critical on rk3288
  clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type
  clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288
  clk: rockchip: Limit use of USB PHY clock to USB on rk3288
  clk: rockchip: Fix video codec clocks on rk3288
  clk: rockchip: Make rkpwm a critical clock on rk3288
  clk: rockchip: fix wrong clock definitions for rk3328

* clk-qoriq:
  clk: qoriq: increase array size of cmux_to_group
  dt-bindings: qoriq-clock: Add ls1028a chip compatible string
  clk: qoriq: Add ls1028a clock configuration
  clk: qoriq: add more PLL divider clocks support
  dt-bindings: qoriq-clock: add more PLL divider clocks support
2019-05-07 11:45:13 -07:00
..
clk-hi3519.c clk: hisilicon: hi3519: add driver remove path and fix some issues 2016-06-30 12:35:20 -07:00
clk-hi3620.c clk: hisilicon: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:21 -08:00
clk-hi3660-stub.c clk: hisilicon: hi3660:Fix potential NULL dereference in hi3660_stub_clk_probe() 2018-03-12 15:12:26 -07:00
clk-hi3660.c clk: hi3660: Mark clk_gate_ufs_subsys as critical 2019-04-19 15:20:35 -07:00
clk-hi3670.c clk: hisilicon: Add clock driver for Hi3670 SoC 2018-10-16 14:47:16 -07:00
clk-hi6220-stub.c clk: hisilicon: Remove CLK_IS_ROOT 2016-03-02 17:43:32 -08:00
clk-hi6220.c clk: hi6220: mark clock cs_atb_syspll as critical 2017-11-01 16:39:03 +01:00
clk-hip04.c clk: hisilicon: Remove CLK_IS_ROOT 2016-03-02 17:43:32 -08:00
clk-hisi-phase.c clk: core: replace clk_{readl,writel} with {readl,writel} 2019-04-23 10:57:49 -07:00
clk-hix5hd2.c clk: hisilicon: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:21 -08:00
clk.c clk: hisilicon: fix potential NULL dereference in hisi_clk_alloc() 2018-03-20 10:23:41 -07:00
clk.h clk: hisilicon: add hisi phase clock support 2018-03-12 15:56:40 +08:00
clkdivider-hi6220.c clk: divider: fix incorrect usage of container_of 2017-12-28 15:16:04 -08:00
clkgate-separated.c clk: hisilicon: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:21 -08:00
crg-hi3516cv300.c clk: hisilicon: mark wdt_mux_p[] as const 2018-03-16 15:57:53 -07:00
crg-hi3798cv200.c clk: hisilicon: add missing usb3 clocks for Hi3798CV200 SoC 2018-05-15 15:12:06 -07:00
crg.h clk: hisilicon: add CRG driver for Hi3798CV200 SoC 2016-11-11 15:43:49 -08:00
Kconfig clk: hisilicon: Add clock driver for Hi3670 SoC 2018-10-16 14:47:16 -07:00
Makefile clk: hisilicon: Add clock driver for Hi3670 SoC 2018-10-16 14:47:16 -07:00
reset.c reset: hisilicon: fix potential NULL pointer dereference 2018-08-31 10:37:00 -07:00
reset.h reset: hisilicon: change the definition of hisi_reset_init 2016-06-30 12:33:22 -07:00