Jisheng Zhang dbfbda3bd6 riscv: mm: update T-Head memory type definitions ... Update T-Head memory type definitions according to C910 doc [1] For NC and IO, SH property isn't configurable, hardcoded as SH, so set SH for NOCACHE and IO. And also set bit[61](Bufferable) for NOCACHE according to the table 6.1 in the doc [1]. Link: https://github.com/T-head-Semi/openc910 [1] Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Guo Ren <guoren@kernel.org> Tested-by: Drew Fustini <dfustini@baylibre.com> Link: https://lore.kernel.org/r/20230912072510.2510-1-jszhang@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-11-05 14:17:32 -08:00
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asm	riscv: mm: update T-Head memory type definitions	2023-11-05 14:17:32 -08:00
uapi/asm	RISC-V: hwprobe: Expose Zicboz extension and its block size	2023-09-21 04:22:25 -07:00