Will Deacon dbf62d5006 ARM: mm: introduce L_PTE_VALID for page table entries ... For long-descriptor translation table formats, the ARMv7 architecture defines the last two bits of the second- and third-level descriptors to be: x0b - Invalid 01b - Block (second-level), Reserved (third-level) 11b - Table (second-level), Page (third-level) This allows us to define L_PTE_PRESENT as (3 << 0) and use this value to create ptes directly. However, when determining whether a given pte value is present in the low-level page table accessors, we only need to check the least significant bit of the descriptor, allowing us to write faulting, present entries which are required for PROT_NONE mappings. This patch introduces L_PTE_VALID, which can be used to test whether a pte should fault, and updates the low-level page table accessors accordingly. Signed-off-by: Will Deacon <will.deacon@arm.com>		2012-11-09 14:13:19 +00:00
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asm	ARM: mm: introduce L_PTE_VALID for page table entries	2012-11-09 14:13:19 +00:00
debug	ARM: socfpga: Fix socfpga compilation with early_printk() enabled	2012-10-25 16:52:53 +02:00
uapi/asm	UAPI: (Scripted) Disintegrate arch/arm/include/asm	2012-10-12 13:05:52 +01:00