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linux/arch/riscv/include
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Anup Patel dadf788699 RISC-V: Add defines for SBI debug console extension 
We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
2023-10-20 16:50:28 +05:30
..
asm RISC-V: Add defines for SBI debug console extension 2023-10-20 16:50:28 +05:30
uapi/asm RISC-V: KVM: Allow Zicond extension for Guest/VM 2023-10-12 18:44:23 +05:30