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When the system supports SME2 the ZT0 register must be context switched as part of the floating point state. This register is stored immediately after ZA in memory and is only accessible when PSTATE.ZA is set so we handle it in the same functions we use to save and restore ZA. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-10-f2fa0aef982f@kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
135 lines
2.4 KiB
ArmAsm
135 lines
2.4 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* FP/SIMD state saving and restoring
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/fpsimdmacros.h>
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/*
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* Save the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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SYM_FUNC_START(fpsimd_save_state)
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fpsimd_save x0, 8
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ret
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SYM_FUNC_END(fpsimd_save_state)
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/*
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* Load the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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SYM_FUNC_START(fpsimd_load_state)
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fpsimd_restore x0, 8
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ret
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SYM_FUNC_END(fpsimd_load_state)
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#ifdef CONFIG_ARM64_SVE
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/*
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* Save the SVE state
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*
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* x0 - pointer to buffer for state
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* x1 - pointer to storage for FPSR
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* x2 - Save FFR if non-zero
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*/
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SYM_FUNC_START(sve_save_state)
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sve_save 0, x1, x2, 3
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ret
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SYM_FUNC_END(sve_save_state)
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/*
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* Load the SVE state
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*
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* x0 - pointer to buffer for state
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* x1 - pointer to storage for FPSR
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* x2 - Restore FFR if non-zero
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*/
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SYM_FUNC_START(sve_load_state)
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sve_load 0, x1, x2, 4
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ret
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SYM_FUNC_END(sve_load_state)
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SYM_FUNC_START(sve_get_vl)
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_sve_rdvl 0, 1
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ret
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SYM_FUNC_END(sve_get_vl)
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SYM_FUNC_START(sve_set_vq)
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sve_load_vq x0, x1, x2
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ret
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SYM_FUNC_END(sve_set_vq)
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/*
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* Zero all SVE registers but the first 128-bits of each vector
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*
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* VQ must already be configured by caller, any further updates of VQ
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* will need to ensure that the register state remains valid.
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*
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* x0 = include FFR?
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* x1 = VQ - 1
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*/
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SYM_FUNC_START(sve_flush_live)
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cbz x1, 1f // A VQ-1 of 0 is 128 bits so no extra Z state
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sve_flush_z
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1: sve_flush_p
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tbz x0, #0, 2f
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sve_flush_ffr
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2: ret
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SYM_FUNC_END(sve_flush_live)
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#endif /* CONFIG_ARM64_SVE */
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#ifdef CONFIG_ARM64_SME
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SYM_FUNC_START(sme_get_vl)
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_sme_rdsvl 0, 1
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ret
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SYM_FUNC_END(sme_get_vl)
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SYM_FUNC_START(sme_set_vq)
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sme_load_vq x0, x1, x2
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ret
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SYM_FUNC_END(sme_set_vq)
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/*
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* Save the ZA and ZT state
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*
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* x0 - pointer to buffer for state
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* x1 - number of ZT registers to save
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*/
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SYM_FUNC_START(sme_save_state)
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_sme_rdsvl 2, 1 // x2 = VL/8
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sme_save_za 0, x2, 12 // Leaves x0 pointing to the end of ZA
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cbz x1, 1f
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_str_zt 0
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1:
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ret
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SYM_FUNC_END(sme_save_state)
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/*
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* Load the ZA and ZT state
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*
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* x0 - pointer to buffer for state
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* x1 - number of ZT registers to save
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*/
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SYM_FUNC_START(sme_load_state)
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_sme_rdsvl 2, 1 // x2 = VL/8
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sme_load_za 0, x2, 12 // Leaves x0 pointing to the end of ZA
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cbz x1, 1f
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_ldr_zt 0
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1:
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ret
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SYM_FUNC_END(sme_load_state)
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#endif /* CONFIG_ARM64_SME */
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