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6d3c55fd4f
The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a special sequence to reset the module. The sequence is - Disable the I2C. - Write to SOFTRESET bit. - Enable the I2C. - Poll on the RESETDONE bit. The sequence is implemented as a function and the i2c_class is updated with the correct 'reset' pointer. omap_hwmod_softreset function is implemented which triggers the softreset by writing into sysconfig register. On following this sequence, i2c module resets properly and timeouts are not seen. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Avinash.H.M <avinashhm@ti.com> [paul@pwsan.com: combined this patch with a patch to remove HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register offset conditional code to use the IP block revision; minor code cleanup] Signed-off-by: Paul Walmsley <paul@pwsan.com>
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/*
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* Helper module for board specific I2C bus registration
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*
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* Copyright (C) 2009 Nokia Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __ASM__ARCH_OMAP_I2C_H
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#define __ASM__ARCH_OMAP_I2C_H
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
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extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len);
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#else
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static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len)
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{
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return 0;
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}
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#endif
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/**
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* i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
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* @fifo_depth: total controller FIFO size (in bytes)
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* @flags: differences in hardware support capability
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*
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* @fifo_depth represents what exists on the hardware, not what is
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* actually configured at runtime by the device driver.
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*/
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struct omap_i2c_dev_attr {
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u8 fifo_depth;
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u32 flags;
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};
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void __init omap1_i2c_mux_pins(int bus_id);
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void __init omap2_i2c_mux_pins(int bus_id);
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struct omap_hwmod;
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int omap_i2c_reset(struct omap_hwmod *oh);
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#endif /* __ASM__ARCH_OMAP_I2C_H */
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