mirror of
https://github.com/torvalds/linux
synced 2024-11-05 18:23:50 +00:00
e790f1deb2
This patch adds support for the Power State Coordination Interface defined by ARM, allowing Linux to request CPU-centric power-management operations from firmware implementing the PSCI protocol. Signed-off-by: Will Deacon <will.deacon@arm.com> [Marc: s/u32/u64/ in the relevant spots, and switch from an initcall to an simpler init function] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
370 lines
8.5 KiB
C
370 lines
8.5 KiB
C
/*
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* Based on arch/arm/kernel/setup.c
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*
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* Copyright (C) 1995-2001 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/utsname.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/bootmem.h>
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#include <linux/seq_file.h>
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#include <linux/screen_info.h>
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#include <linux/init.h>
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#include <linux/kexec.h>
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#include <linux/crash_dump.h>
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#include <linux/root_dev.h>
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#include <linux/cpu.h>
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#include <linux/interrupt.h>
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#include <linux/smp.h>
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#include <linux/fs.h>
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#include <linux/proc_fs.h>
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#include <linux/memblock.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <asm/cputype.h>
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#include <asm/elf.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/traps.h>
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#include <asm/memblock.h>
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#include <asm/psci.h>
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unsigned int processor_id;
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EXPORT_SYMBOL(processor_id);
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unsigned int elf_hwcap __read_mostly;
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EXPORT_SYMBOL_GPL(elf_hwcap);
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static const char *cpu_name;
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static const char *machine_name;
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phys_addr_t __fdt_pointer __initdata;
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/*
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* Standard memory resources
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*/
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static struct resource mem_res[] = {
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{
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.name = "Kernel code",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_MEM
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},
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{
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.name = "Kernel data",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_MEM
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}
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};
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#define kernel_code mem_res[0]
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#define kernel_data mem_res[1]
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void __init early_print(const char *str, ...)
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{
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char buf[256];
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va_list ap;
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va_start(ap, str);
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vsnprintf(buf, sizeof(buf), str, ap);
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va_end(ap);
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printk("%s", buf);
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}
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static void __init setup_processor(void)
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{
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struct cpu_info *cpu_info;
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/*
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* locate processor in the list of supported processor
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* types. The linker builds this table for us from the
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* entries in arch/arm/mm/proc.S
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*/
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cpu_info = lookup_processor_type(read_cpuid_id());
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if (!cpu_info) {
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printk("CPU configuration botched (ID %08x), unable to continue.\n",
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read_cpuid_id());
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while (1);
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}
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cpu_name = cpu_info->cpu_name;
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printk("CPU: %s [%08x] revision %d\n",
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cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
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sprintf(init_utsname()->machine, "aarch64");
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elf_hwcap = 0;
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}
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static void __init setup_machine_fdt(phys_addr_t dt_phys)
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{
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struct boot_param_header *devtree;
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unsigned long dt_root;
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/* Check we have a non-NULL DT pointer */
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if (!dt_phys) {
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early_print("\n"
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"Error: NULL or invalid device tree blob\n"
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"The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
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"\nPlease check your bootloader.\n");
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while (true)
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cpu_relax();
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}
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devtree = phys_to_virt(dt_phys);
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/* Check device tree validity */
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if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) {
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early_print("\n"
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"Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
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"Expected 0x%x, found 0x%x\n"
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"\nPlease check your bootloader.\n",
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dt_phys, devtree, OF_DT_HEADER,
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be32_to_cpu(devtree->magic));
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while (true)
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cpu_relax();
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}
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initial_boot_params = devtree;
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dt_root = of_get_flat_dt_root();
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machine_name = of_get_flat_dt_prop(dt_root, "model", NULL);
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if (!machine_name)
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machine_name = of_get_flat_dt_prop(dt_root, "compatible", NULL);
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if (!machine_name)
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machine_name = "<unknown>";
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pr_info("Machine: %s\n", machine_name);
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/* Retrieve various information from the /chosen node */
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of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
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/* Initialize {size,address}-cells info */
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of_scan_flat_dt(early_init_dt_scan_root, NULL);
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/* Setup memory, calling early_init_dt_add_memory_arch */
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of_scan_flat_dt(early_init_dt_scan_memory, NULL);
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}
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void __init early_init_dt_add_memory_arch(u64 base, u64 size)
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{
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base &= PAGE_MASK;
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size &= PAGE_MASK;
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if (base + size < PHYS_OFFSET) {
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pr_warning("Ignoring memory block 0x%llx - 0x%llx\n",
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base, base + size);
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return;
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}
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if (base < PHYS_OFFSET) {
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pr_warning("Ignoring memory range 0x%llx - 0x%llx\n",
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base, PHYS_OFFSET);
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size -= PHYS_OFFSET - base;
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base = PHYS_OFFSET;
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}
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memblock_add(base, size);
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}
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void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
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{
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return __va(memblock_alloc(size, align));
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}
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/*
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* Limit the memory size that was specified via FDT.
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*/
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static int __init early_mem(char *p)
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{
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phys_addr_t limit;
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if (!p)
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return 1;
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limit = memparse(p, &p) & PAGE_MASK;
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pr_notice("Memory limited to %lldMB\n", limit >> 20);
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memblock_enforce_memory_limit(limit);
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return 0;
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}
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early_param("mem", early_mem);
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static void __init request_standard_resources(void)
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{
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struct memblock_region *region;
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struct resource *res;
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kernel_code.start = virt_to_phys(_text);
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kernel_code.end = virt_to_phys(_etext - 1);
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kernel_data.start = virt_to_phys(_sdata);
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kernel_data.end = virt_to_phys(_end - 1);
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for_each_memblock(memory, region) {
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res = alloc_bootmem_low(sizeof(*res));
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res->name = "System RAM";
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res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
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res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
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res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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request_resource(&iomem_resource, res);
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if (kernel_code.start >= res->start &&
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kernel_code.end <= res->end)
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request_resource(res, &kernel_code);
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if (kernel_data.start >= res->start &&
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kernel_data.end <= res->end)
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request_resource(res, &kernel_data);
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}
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}
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void __init setup_arch(char **cmdline_p)
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{
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setup_processor();
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setup_machine_fdt(__fdt_pointer);
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init_mm.start_code = (unsigned long) _text;
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init_mm.end_code = (unsigned long) _etext;
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init_mm.end_data = (unsigned long) _edata;
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init_mm.brk = (unsigned long) _end;
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*cmdline_p = boot_command_line;
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parse_early_param();
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arm64_memblock_init();
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paging_init();
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request_standard_resources();
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unflatten_device_tree();
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psci_init();
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#ifdef CONFIG_SMP
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smp_init_cpus();
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#endif
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#ifdef CONFIG_VT
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#if defined(CONFIG_VGA_CONSOLE)
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conswitchp = &vga_con;
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#elif defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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#endif
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#endif
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}
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static DEFINE_PER_CPU(struct cpu, cpu_data);
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static int __init topology_init(void)
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{
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int i;
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for_each_possible_cpu(i) {
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struct cpu *cpu = &per_cpu(cpu_data, i);
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cpu->hotpluggable = 1;
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register_cpu(cpu, i);
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}
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return 0;
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}
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subsys_initcall(topology_init);
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static int __init arm64_device_probe(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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return 0;
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}
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device_initcall(arm64_device_probe);
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static const char *hwcap_str[] = {
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"fp",
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"asimd",
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NULL
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};
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static int c_show(struct seq_file *m, void *v)
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{
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int i;
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seq_printf(m, "Processor\t: %s rev %d (%s)\n",
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cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
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for_each_online_cpu(i) {
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/*
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* glibc reads /proc/cpuinfo to determine the number of
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* online processors, looking for lines beginning with
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* "processor". Give glibc what it expects.
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*/
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#ifdef CONFIG_SMP
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seq_printf(m, "processor\t: %d\n", i);
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#endif
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seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
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loops_per_jiffy / (500000UL/HZ),
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loops_per_jiffy / (5000UL/HZ) % 100);
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}
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/* dump out the processor features */
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seq_puts(m, "Features\t: ");
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for (i = 0; hwcap_str[i]; i++)
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if (elf_hwcap & (1 << i))
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seq_printf(m, "%s ", hwcap_str[i]);
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seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
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seq_printf(m, "CPU architecture: AArch64\n");
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seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
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seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
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seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
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seq_puts(m, "\n");
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seq_printf(m, "Hardware\t: %s\n", machine_name);
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < 1 ? (void *)1 : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return NULL;
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = c_show
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};
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