linux/include/drm/drm_mipi_dbi.h
Noralf Trønnes 4aebb79021 drm/mipi-dbi: Add support for DRM_FORMAT_RGB888
DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it
on the SPI bus using a 24 bits per word transfer. The problem with this
is that not all SPI controllers support 24 bpw.

Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI
bus is big endian we use 8 bpw to always get the same pixel format on the
bus: b8g8r8.

The MIPI DCS specification lists the standard commands that can be sent
over the MIPI DBI interface. The set_address_mode (36h) command has one
bit in the parameter that controls RGB/BGR order. This means that the
controller can be configured to receive the pixel as BGR.

RGB888 is rarely supported on these controllers but RGB666 is very common.
All datasheets I have seen do at least support the pixel format option
where each color is sent as one byte and the 6 MSB's are used.

All this put together means that we can send each pixel as b8g8r8 and an
RGB666 capable controller sees this as b6x2g6x2r6x2.

v4:
- s/emulation_format/pixel_format/ (Dmitry)

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240604-panel-mipi-dbi-rgb666-v4-4-d7c2bcb9b78d@tronnes.org
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
2024-06-07 16:09:05 +02:00

260 lines
7.1 KiB
C

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* MIPI Display Bus Interface (DBI) LCD controller support
*
* Copyright 2016 Noralf Trønnes
*/
#ifndef __LINUX_MIPI_DBI_H
#define __LINUX_MIPI_DBI_H
#include <linux/mutex.h>
#include <drm/drm_device.h>
#include <drm/drm_simple_kms_helper.h>
struct drm_format_conv_state;
struct drm_rect;
struct gpio_desc;
struct iosys_map;
struct regulator;
struct spi_device;
/**
* struct mipi_dbi - MIPI DBI interface
*/
struct mipi_dbi {
/**
* @cmdlock: Command lock
*/
struct mutex cmdlock;
/**
* @command: Bus specific callback executing commands.
*/
int (*command)(struct mipi_dbi *dbi, u8 *cmd, u8 *param, size_t num);
/**
* @read_commands: Array of read commands terminated by a zero entry.
* Reading is disabled if this is NULL.
*/
const u8 *read_commands;
/**
* @swap_bytes: Swap bytes in buffer before transfer
*/
bool swap_bytes;
/**
* @reset: Optional reset gpio
*/
struct gpio_desc *reset;
/* Type C specific */
/**
* @spi: SPI device
*/
struct spi_device *spi;
/**
* @write_memory_bpw: Bits per word used on a MIPI_DCS_WRITE_MEMORY_START transfer
*/
unsigned int write_memory_bpw;
/**
* @dc: Optional D/C gpio.
*/
struct gpio_desc *dc;
/**
* @tx_buf9: Buffer used for Option 1 9-bit conversion
*/
void *tx_buf9;
/**
* @tx_buf9_len: Size of tx_buf9.
*/
size_t tx_buf9_len;
};
/**
* struct mipi_dbi_dev - MIPI DBI device
*/
struct mipi_dbi_dev {
/**
* @drm: DRM device
*/
struct drm_device drm;
/**
* @pipe: Display pipe structure
*/
struct drm_simple_display_pipe pipe;
/**
* @connector: Connector
*/
struct drm_connector connector;
/**
* @mode: Fixed display mode
*/
struct drm_display_mode mode;
/**
* @pixel_format: Native pixel format (DRM_FORMAT\_\*)
*/
u32 pixel_format;
/**
* @tx_buf: Buffer used for transfer (copy clip rect area)
*/
u16 *tx_buf;
/**
* @rotation: initial rotation in degrees Counter Clock Wise
*/
unsigned int rotation;
/**
* @left_offset: Horizontal offset of the display relative to the
* controller's driver array
*/
unsigned int left_offset;
/**
* @top_offset: Vertical offset of the display relative to the
* controller's driver array
*/
unsigned int top_offset;
/**
* @backlight: backlight device (optional)
*/
struct backlight_device *backlight;
/**
* @regulator: power regulator (Vdd) (optional)
*/
struct regulator *regulator;
/**
* @io_regulator: I/O power regulator (Vddi) (optional)
*/
struct regulator *io_regulator;
/**
* @dbi: MIPI DBI interface
*/
struct mipi_dbi dbi;
/**
* @driver_private: Driver private data.
* Necessary for drivers with private data since devm_drm_dev_alloc()
* can't allocate structures that embed a structure which then again
* embeds drm_device.
*/
void *driver_private;
};
static inline struct mipi_dbi_dev *drm_to_mipi_dbi_dev(struct drm_device *drm)
{
return container_of(drm, struct mipi_dbi_dev, drm);
}
int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi,
struct gpio_desc *dc);
int mipi_dbi_dev_init_with_formats(struct mipi_dbi_dev *dbidev,
const struct drm_simple_display_pipe_funcs *funcs,
const uint32_t *formats, unsigned int format_count,
const struct drm_display_mode *mode,
unsigned int rotation, size_t tx_buf_size);
int mipi_dbi_dev_init(struct mipi_dbi_dev *dbidev,
const struct drm_simple_display_pipe_funcs *funcs,
const struct drm_display_mode *mode, unsigned int rotation);
enum drm_mode_status mipi_dbi_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
const struct drm_display_mode *mode);
void mipi_dbi_pipe_update(struct drm_simple_display_pipe *pipe,
struct drm_plane_state *old_state);
void mipi_dbi_enable_flush(struct mipi_dbi_dev *dbidev,
struct drm_crtc_state *crtc_state,
struct drm_plane_state *plan_state);
void mipi_dbi_pipe_disable(struct drm_simple_display_pipe *pipe);
int mipi_dbi_pipe_begin_fb_access(struct drm_simple_display_pipe *pipe,
struct drm_plane_state *plane_state);
void mipi_dbi_pipe_end_fb_access(struct drm_simple_display_pipe *pipe,
struct drm_plane_state *plane_state);
void mipi_dbi_pipe_reset_plane(struct drm_simple_display_pipe *pipe);
struct drm_plane_state *mipi_dbi_pipe_duplicate_plane_state(struct drm_simple_display_pipe *pipe);
void mipi_dbi_pipe_destroy_plane_state(struct drm_simple_display_pipe *pipe,
struct drm_plane_state *plane_state);
void mipi_dbi_hw_reset(struct mipi_dbi *dbi);
bool mipi_dbi_display_is_on(struct mipi_dbi *dbi);
int mipi_dbi_poweron_reset(struct mipi_dbi_dev *dbidev);
int mipi_dbi_poweron_conditional_reset(struct mipi_dbi_dev *dbidev);
u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len);
int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz,
u8 bpw, const void *buf, size_t len);
int mipi_dbi_command_read(struct mipi_dbi *dbi, u8 cmd, u8 *val);
int mipi_dbi_command_buf(struct mipi_dbi *dbi, u8 cmd, u8 *data, size_t len);
int mipi_dbi_command_stackbuf(struct mipi_dbi *dbi, u8 cmd, const u8 *data,
size_t len);
int mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer *fb,
struct drm_rect *clip, bool swap,
struct drm_format_conv_state *fmtcnv_state);
/**
* mipi_dbi_command - MIPI DCS command with optional parameter(s)
* @dbi: MIPI DBI structure
* @cmd: Command
* @seq: Optional parameter(s)
*
* Send MIPI DCS command to the controller. Use mipi_dbi_command_read() for
* get/read.
*
* Returns:
* Zero on success, negative error code on failure.
*/
#define mipi_dbi_command(dbi, cmd, seq...) \
({ \
const u8 d[] = { seq }; \
struct device *dev = &(dbi)->spi->dev; \
int ret; \
ret = mipi_dbi_command_stackbuf(dbi, cmd, d, ARRAY_SIZE(d)); \
if (ret) \
dev_err_ratelimited(dev, "error %d when sending command %#02x\n", ret, cmd); \
ret; \
})
#ifdef CONFIG_DEBUG_FS
void mipi_dbi_debugfs_init(struct drm_minor *minor);
#else
static inline void mipi_dbi_debugfs_init(struct drm_minor *minor) {}
#endif
/**
* DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS - Initializes struct drm_simple_display_pipe_funcs
* for MIPI-DBI devices
* @enable_: Enable-callback implementation
*
* This macro initializes struct drm_simple_display_pipe_funcs with default
* values for MIPI-DBI-based devices. The only callback that depends on the
* hardware is @enable, for which the driver has to provide an implementation.
* MIPI-based drivers are encouraged to use this macro for initialization.
*/
#define DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(enable_) \
.mode_valid = mipi_dbi_pipe_mode_valid, \
.enable = (enable_), \
.disable = mipi_dbi_pipe_disable, \
.update = mipi_dbi_pipe_update, \
.begin_fb_access = mipi_dbi_pipe_begin_fb_access, \
.end_fb_access = mipi_dbi_pipe_end_fb_access, \
.reset_plane = mipi_dbi_pipe_reset_plane, \
.duplicate_plane_state = mipi_dbi_pipe_duplicate_plane_state, \
.destroy_plane_state = mipi_dbi_pipe_destroy_plane_state
#endif /* __LINUX_MIPI_DBI_H */