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dc8d966bcc
Convert pcibios_assign_all_busses from a define to inline so platforms can control this setting. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
26 lines
746 B
C
26 lines
746 B
C
/*
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* arch/arm/mach-ep93xx/include/mach/hardware.h
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <mach/ep93xx-regs.h>
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#include <mach/platform.h>
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/*
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* The EP93xx has two external crystal oscillators. To generate the
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* required high-frequency clocks, the processor uses two phase-locked-
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* loops (PLLs) to multiply the incoming external clock signal to much
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* higher frequencies that are then divided down by programmable dividers
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* to produce the needed clocks. The PLLs operate independently of one
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* another.
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*/
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#define EP93XX_EXT_CLK_RATE 14745600
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#define EP93XX_EXT_RTC_RATE 32768
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#define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4)
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#define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16)
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#endif
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