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8ca4582218
This patch removes the L4 wakeup io mapping section for omap3 and omap4. L4 wakeup space is part of 4MB L4 space which is already mapped and hence remove the overlapped mapping. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
306 lines
10 KiB
C
306 lines
10 KiB
C
/*
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* arch/arm/plat-omap/include/mach/io.h
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*
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* IO definitions for TI OMAP processors and boards
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*
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* Copied from arch/arm/mach-sa1100/include/mach/io.h
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* Copyright (C) 1997-1999 Russell King
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*
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* Copyright (C) 2009 Texas Instruments
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* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Modifications:
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* 06-12-1997 RMK Created.
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* 07-04-1999 RMK Major cleanup
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*/
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#ifndef __ASM_ARM_ARCH_IO_H
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#define __ASM_ARM_ARCH_IO_H
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#include <mach/hardware.h>
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#define IO_SPACE_LIMIT 0xffffffff
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/*
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* We don't actually have real ISA nor PCI buses, but there is so many
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* drivers out there that might just work if we fake them...
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*/
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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/*
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* ----------------------------------------------------------------------------
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* I/O mapping
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* ----------------------------------------------------------------------------
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*/
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#ifdef __ASSEMBLER__
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#define IOMEM(x) (x)
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#else
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#define IOMEM(x) ((void __force __iomem *)(x))
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#endif
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#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
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#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
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#define OMAP2_L3_IO_OFFSET 0x90000000
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#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
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#define OMAP2_L4_IO_OFFSET 0xb2000000
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#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
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#define OMAP4_L3_IO_OFFSET 0xb4000000
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#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
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#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
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#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
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#define OMAP4_GPMC_IO_OFFSET 0xa9000000
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#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
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#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
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#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
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/*
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* ----------------------------------------------------------------------------
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* Omap1 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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#define OMAP1_IO_PHYS 0xFFFB0000
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#define OMAP1_IO_SIZE 0x40000
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#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
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/*
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* ----------------------------------------------------------------------------
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* Omap2 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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/* We map both L3 and L4 on OMAP2 */
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#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
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#define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
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#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
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#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
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#define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
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#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
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#define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_WK_243X_SIZE SZ_1M
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#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
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#define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
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/* 0x6e000000 --> 0xfe000000 */
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#define OMAP243X_GPMC_SIZE SZ_1M
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#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
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/* 0x6D000000 --> 0xfd000000 */
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#define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP243X_SDRC_SIZE SZ_1M
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#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
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/* 0x6c000000 --> 0xfc000000 */
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#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP243X_SMS_SIZE SZ_1M
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/* 2420 IVA */
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#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
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/* 0x58000000 --> 0xfc100000 */
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#define DSP_MEM_2420_VIRT 0xfc100000
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#define DSP_MEM_2420_SIZE 0x28000
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#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
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/* 0x59000000 --> 0xfc128000 */
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#define DSP_IPI_2420_VIRT 0xfc128000
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#define DSP_IPI_2420_SIZE SZ_4K
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#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
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/* 0x5a000000 --> 0xfc129000 */
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#define DSP_MMU_2420_VIRT 0xfc129000
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#define DSP_MMU_2420_SIZE SZ_4K
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/* 2430 IVA2.1 - currently unmapped */
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/*
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* ----------------------------------------------------------------------------
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* Omap3 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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/* We map both L3 and L4 on OMAP3 */
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#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
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#define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
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#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
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#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
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#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
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/*
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* Need to look at the Size 4M for L4.
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* VPOM3430 was not working for Int controller
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*/
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#define L4_PER_34XX_PHYS L4_PER_34XX_BASE
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/* 0x49000000 --> 0xfb000000 */
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#define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_PER_34XX_SIZE SZ_1M
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#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
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/* 0x54000000 --> 0xfe800000 */
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#define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
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#define L4_EMU_34XX_SIZE SZ_8M
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#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
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/* 0x6e000000 --> 0xfe000000 */
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#define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP34XX_GPMC_SIZE SZ_1M
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#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
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/* 0x6c000000 --> 0xfc000000 */
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#define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP343X_SMS_SIZE SZ_1M
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#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
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/* 0x6D000000 --> 0xfd000000 */
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#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
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#define OMAP343X_SDRC_SIZE SZ_1M
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/* 3430 IVA - currently unmapped */
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/*
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* ----------------------------------------------------------------------------
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* Omap4 specific IO mapping
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* ----------------------------------------------------------------------------
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*/
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/* We map both L3 and L4 on OMAP4 */
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#define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
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#define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
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#define L3_44XX_SIZE SZ_1M
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#define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
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#define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_44XX_SIZE SZ_4M
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#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
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/* 0x48000000 --> 0xfa000000 */
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#define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_PER_44XX_SIZE SZ_4M
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#define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
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/* 0x49000000 --> 0xfb000000 */
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#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
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#define L4_ABE_44XX_SIZE SZ_1M
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#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
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/* 0x54000000 --> 0xfe800000 */
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#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
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#define L4_EMU_44XX_SIZE SZ_8M
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#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
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/* 0x50000000 --> 0xf9000000 */
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#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
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#define OMAP44XX_GPMC_SIZE SZ_1M
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#define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
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/* 0x4c000000 --> 0xfd100000 */
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#define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
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#define OMAP44XX_EMIF1_SIZE SZ_1M
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#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
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/* 0x4d000000 --> 0xfd200000 */
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#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
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#define OMAP44XX_EMIF2_SIZE SZ_1M
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#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
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/* 0x4e000000 --> 0xfd300000 */
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#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
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#define OMAP44XX_DMM_SIZE SZ_1M
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/*
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* ----------------------------------------------------------------------------
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* Omap specific register access
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* ----------------------------------------------------------------------------
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*/
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#ifndef __ASSEMBLER__
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/*
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* NOTE: Please use ioremap + __raw_read/write where possible instead of these
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*/
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extern u8 omap_readb(u32 pa);
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extern u16 omap_readw(u32 pa);
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extern u32 omap_readl(u32 pa);
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extern void omap_writeb(u8 v, u32 pa);
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extern void omap_writew(u16 v, u32 pa);
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extern void omap_writel(u32 v, u32 pa);
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struct omap_sdrc_params;
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extern void omap1_map_common_io(void);
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extern void omap1_init_common_hw(void);
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#ifdef CONFIG_ARCH_OMAP2420
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extern void omap242x_map_common_io(void);
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#else
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static inline void omap242x_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP2430
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extern void omap243x_map_common_io(void);
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#else
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static inline void omap243x_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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extern void omap34xx_map_common_io(void);
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#else
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static inline void omap34xx_map_common_io(void)
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{
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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extern void omap44xx_map_common_io(void);
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#else
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static inline void omap44xx_map_common_io(void)
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{
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}
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#endif
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extern void omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
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struct omap_sdrc_params *sdrc_cs1);
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#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t)
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#define __arch_iounmap(v) omap_iounmap(v)
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void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
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void omap_iounmap(volatile void __iomem *addr);
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#endif
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#endif
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