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c08e20d246
mach-socfpga is another platform that needs to use v7_invalidate_l1 to bringup additional cores. There was a comment that the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Pavel Machek <pavel@denx.de> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Pavel Machek <pavel@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Olof Johansson <olof@lixom.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
60 lines
1.4 KiB
ArmAsm
60 lines
1.4 KiB
ArmAsm
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/asm-offsets.h>
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#include <asm/hardware/cache-l2x0.h>
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.section ".text.head", "ax"
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#ifdef CONFIG_SMP
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ENTRY(v7_secondary_startup)
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bl v7_invalidate_l1
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b secondary_startup
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ENDPROC(v7_secondary_startup)
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#endif
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#ifdef CONFIG_PM
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/*
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* The following code is located into the .data section. This is to
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* allow phys_l2x0_saved_regs to be accessed with a relative load
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* as we are running on physical address here.
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*/
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.data
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.align
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#ifdef CONFIG_CACHE_L2X0
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.macro pl310_resume
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ldr r2, phys_l2x0_saved_regs
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ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0
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ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value
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str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl
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mov r1, #0x1
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str r1, [r0, #L2X0_CTRL] @ re-enable L2
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.endm
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.globl phys_l2x0_saved_regs
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phys_l2x0_saved_regs:
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.long 0
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#else
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.macro pl310_resume
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.endm
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#endif
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ENTRY(v7_cpu_resume)
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bl v7_invalidate_l1
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pl310_resume
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b cpu_resume
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ENDPROC(v7_cpu_resume)
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#endif
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