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29c6584f33
Add a vbus supply regulator phandle, so the PHY can enable the VBUS voltage rail when powering up. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
21 lines
597 B
Plaintext
21 lines
597 B
Plaintext
* Freescale i.MX8MQ USB3 PHY binding
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Required properties:
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- compatible: Should be "fsl,imx8mq-usb-phy"
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- #phys-cells: must be 0 (see phy-bindings.txt in this directory)
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- reg: The base address and length of the registers
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- clocks: phandles to the clocks for each clock listed in clock-names
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- clock-names: must contain "phy"
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Optional properties:
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- vbus-supply: A phandle to the regulator for USB VBUS.
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Example:
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usb3_phy0: phy@381f0040 {
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compatible = "fsl,imx8mq-usb-phy";
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reg = <0x381f0040 0x40>;
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clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
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clock-names = "phy";
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#phy-cells = <0>;
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};
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