mirror of
https://github.com/torvalds/linux
synced 2024-07-21 10:41:44 +00:00
d0a846ba28
Add support for the single and dual-lane PHYs found on SC8280XP. Note that the SC8280XP binding does not try to describe every register subregion and instead the driver holds the corresponding offsets. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20221105145939.20318-16-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
19 lines
585 B
C
19 lines
585 B
C
/* Only for QMP V5 PHY - PCS_PCIE registers */
|
|
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright (c) 2017, The Linux Foundation. All rights reserved.
|
|
*/
|
|
|
|
#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_H_
|
|
#define QCOM_PHY_QMP_PCS_PCIE_V5_H_
|
|
|
|
/* Only for QMP V5 PHY - PCS_PCIE registers */
|
|
#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 0x0c
|
|
#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 0x14
|
|
#define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20
|
|
#define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x54
|
|
#define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x94
|
|
#define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa8
|
|
|
|
#endif
|