Sean Christopherson c23e2b7103 KVM: Allow page-sized MMU caches to be initialized with custom 64-bit values ... Add support to MMU caches for initializing a page with a custom 64-bit value, e.g. to pre-fill an entire page table with non-zero PTE values. The functionality will be used by x86 to support Intel's TDX, which needs to set bit 63 in all non-present PTEs in order to prevent !PRESENT page faults from getting reflected into the guest (Intel's EPT Violation #VE architecture made the less than brilliant decision of having the per-PTE behavior be opt-out instead of opt-in). Signed-off-by: Sean Christopherson <seanjc@google.com> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com> Message-Id: <5919f685f109a1b0ebc6bd8fc4536ee94bcc172d.1705965635.git.isaku.yamahata@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Binbin Wu <binbin.wu@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2024-04-19 12:15:18 -04:00
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kvm	KVM: Allow page-sized MMU caches to be initialized with custom 64-bit values	2024-04-19 12:15:18 -04:00
lib	Revert "irqbypass: do not start cons/prod when failed connect"	2021-05-15 10:26:55 +01:00
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