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https://github.com/torvalds/linux
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2ce987d7ee
The idi48 regmap can be used in an interrupt context by regmap-irq. To
prevent a deadlock, enable use_raw_spinlock for idi48_regmap_config.
Fixes: e28432a773 ("gpio: 104-idi-48: Migrate to the regmap-irq API")
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
189 lines
6.4 KiB
C
189 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* GPIO driver for the ACCES 104-IDI-48 family
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* Copyright (C) 2015 William Breathitt Gray
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*
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* This driver supports the following ACCES devices: 104-IDI-48A,
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* 104-IDI-48AC, 104-IDI-48B, and 104-IDI-48BC.
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*/
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#include <linux/bits.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/gpio/regmap.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/isa.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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#define IDI_48_EXTENT 8
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#define MAX_NUM_IDI_48 max_num_isa_dev(IDI_48_EXTENT)
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static unsigned int base[MAX_NUM_IDI_48];
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static unsigned int num_idi_48;
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module_param_hw_array(base, uint, ioport, &num_idi_48, 0);
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MODULE_PARM_DESC(base, "ACCES 104-IDI-48 base addresses");
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static unsigned int irq[MAX_NUM_IDI_48];
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static unsigned int num_irq;
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module_param_hw_array(irq, uint, irq, &num_irq, 0);
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MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers");
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#define IDI48_IRQ_STATUS 0x7
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#define IDI48_IRQ_ENABLE IDI48_IRQ_STATUS
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static int idi_48_reg_mask_xlate(struct gpio_regmap *gpio, unsigned int base,
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unsigned int offset, unsigned int *reg,
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unsigned int *mask)
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{
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const unsigned int line = offset % 8;
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const unsigned int stride = offset / 8;
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const unsigned int port = (stride / 3) * 4;
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const unsigned int port_stride = stride % 3;
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*reg = base + port + port_stride;
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*mask = BIT(line);
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return 0;
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}
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static const struct regmap_range idi_48_wr_ranges[] = {
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regmap_reg_range(0x0, 0x6),
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};
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static const struct regmap_range idi_48_rd_ranges[] = {
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regmap_reg_range(0x0, 0x2), regmap_reg_range(0x4, 0x7),
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};
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static const struct regmap_range idi_48_precious_ranges[] = {
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regmap_reg_range(0x7, 0x7),
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};
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static const struct regmap_access_table idi_48_wr_table = {
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.no_ranges = idi_48_wr_ranges,
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.n_no_ranges = ARRAY_SIZE(idi_48_wr_ranges),
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};
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static const struct regmap_access_table idi_48_rd_table = {
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.yes_ranges = idi_48_rd_ranges,
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.n_yes_ranges = ARRAY_SIZE(idi_48_rd_ranges),
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};
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static const struct regmap_access_table idi_48_precious_table = {
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.yes_ranges = idi_48_precious_ranges,
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.n_yes_ranges = ARRAY_SIZE(idi_48_precious_ranges),
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};
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static const struct regmap_config idi48_regmap_config = {
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.reg_bits = 8,
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.reg_stride = 1,
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.val_bits = 8,
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.io_port = true,
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.max_register = 0x6,
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.wr_table = &idi_48_wr_table,
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.rd_table = &idi_48_rd_table,
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.precious_table = &idi_48_precious_table,
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.use_raw_spinlock = true,
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};
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#define IDI48_NGPIO 48
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#define IDI48_REGMAP_IRQ(_id) \
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[_id] = { \
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.mask = BIT((_id) / 8), \
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.type = { .types_supported = IRQ_TYPE_EDGE_BOTH }, \
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}
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static const struct regmap_irq idi48_regmap_irqs[IDI48_NGPIO] = {
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IDI48_REGMAP_IRQ(0), IDI48_REGMAP_IRQ(1), IDI48_REGMAP_IRQ(2), /* 0-2 */
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IDI48_REGMAP_IRQ(3), IDI48_REGMAP_IRQ(4), IDI48_REGMAP_IRQ(5), /* 3-5 */
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IDI48_REGMAP_IRQ(6), IDI48_REGMAP_IRQ(7), IDI48_REGMAP_IRQ(8), /* 6-8 */
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IDI48_REGMAP_IRQ(9), IDI48_REGMAP_IRQ(10), IDI48_REGMAP_IRQ(11), /* 9-11 */
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IDI48_REGMAP_IRQ(12), IDI48_REGMAP_IRQ(13), IDI48_REGMAP_IRQ(14), /* 12-14 */
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IDI48_REGMAP_IRQ(15), IDI48_REGMAP_IRQ(16), IDI48_REGMAP_IRQ(17), /* 15-17 */
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IDI48_REGMAP_IRQ(18), IDI48_REGMAP_IRQ(19), IDI48_REGMAP_IRQ(20), /* 18-20 */
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IDI48_REGMAP_IRQ(21), IDI48_REGMAP_IRQ(22), IDI48_REGMAP_IRQ(23), /* 21-23 */
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IDI48_REGMAP_IRQ(24), IDI48_REGMAP_IRQ(25), IDI48_REGMAP_IRQ(26), /* 24-26 */
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IDI48_REGMAP_IRQ(27), IDI48_REGMAP_IRQ(28), IDI48_REGMAP_IRQ(29), /* 27-29 */
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IDI48_REGMAP_IRQ(30), IDI48_REGMAP_IRQ(31), IDI48_REGMAP_IRQ(32), /* 30-32 */
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IDI48_REGMAP_IRQ(33), IDI48_REGMAP_IRQ(34), IDI48_REGMAP_IRQ(35), /* 33-35 */
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IDI48_REGMAP_IRQ(36), IDI48_REGMAP_IRQ(37), IDI48_REGMAP_IRQ(38), /* 36-38 */
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IDI48_REGMAP_IRQ(39), IDI48_REGMAP_IRQ(40), IDI48_REGMAP_IRQ(41), /* 39-41 */
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IDI48_REGMAP_IRQ(42), IDI48_REGMAP_IRQ(43), IDI48_REGMAP_IRQ(44), /* 42-44 */
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IDI48_REGMAP_IRQ(45), IDI48_REGMAP_IRQ(46), IDI48_REGMAP_IRQ(47), /* 45-47 */
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};
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static const char *idi48_names[IDI48_NGPIO] = {
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"Bit 0 A", "Bit 1 A", "Bit 2 A", "Bit 3 A", "Bit 4 A", "Bit 5 A",
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"Bit 6 A", "Bit 7 A", "Bit 8 A", "Bit 9 A", "Bit 10 A", "Bit 11 A",
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"Bit 12 A", "Bit 13 A", "Bit 14 A", "Bit 15 A", "Bit 16 A", "Bit 17 A",
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"Bit 18 A", "Bit 19 A", "Bit 20 A", "Bit 21 A", "Bit 22 A", "Bit 23 A",
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"Bit 0 B", "Bit 1 B", "Bit 2 B", "Bit 3 B", "Bit 4 B", "Bit 5 B",
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"Bit 6 B", "Bit 7 B", "Bit 8 B", "Bit 9 B", "Bit 10 B", "Bit 11 B",
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"Bit 12 B", "Bit 13 B", "Bit 14 B", "Bit 15 B", "Bit 16 B", "Bit 17 B",
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"Bit 18 B", "Bit 19 B", "Bit 20 B", "Bit 21 B", "Bit 22 B", "Bit 23 B"
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};
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static int idi_48_probe(struct device *dev, unsigned int id)
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{
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const char *const name = dev_name(dev);
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struct gpio_regmap_config config = {};
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void __iomem *regs;
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struct regmap *map;
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struct regmap_irq_chip *chip;
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struct regmap_irq_chip_data *chip_data;
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int err;
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if (!devm_request_region(dev, base[id], IDI_48_EXTENT, name)) {
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dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
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base[id], base[id] + IDI_48_EXTENT);
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return -EBUSY;
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}
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regs = devm_ioport_map(dev, base[id], IDI_48_EXTENT);
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if (!regs)
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return -ENOMEM;
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map = devm_regmap_init_mmio(dev, regs, &idi48_regmap_config);
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if (IS_ERR(map))
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return dev_err_probe(dev, PTR_ERR(map),
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"Unable to initialize register map\n");
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chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->name = name;
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chip->status_base = IDI48_IRQ_STATUS;
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chip->unmask_base = IDI48_IRQ_ENABLE;
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chip->clear_on_unmask = true;
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chip->num_regs = 1;
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chip->irqs = idi48_regmap_irqs;
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chip->num_irqs = ARRAY_SIZE(idi48_regmap_irqs);
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err = devm_regmap_add_irq_chip(dev, map, irq[id], IRQF_SHARED, 0, chip,
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&chip_data);
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if (err)
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return dev_err_probe(dev, err, "IRQ registration failed\n");
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config.parent = dev;
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config.regmap = map;
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config.ngpio = IDI48_NGPIO;
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config.names = idi48_names;
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config.reg_dat_base = GPIO_REGMAP_ADDR(0x0);
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config.ngpio_per_reg = 8;
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config.reg_mask_xlate = idi_48_reg_mask_xlate;
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config.irq_domain = regmap_irq_get_domain(chip_data);
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return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &config));
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}
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static struct isa_driver idi_48_driver = {
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.probe = idi_48_probe,
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.driver = {
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.name = "104-idi-48"
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},
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};
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module_isa_driver_with_irq(idi_48_driver, num_idi_48, num_irq);
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MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
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MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
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MODULE_LICENSE("GPL v2");
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