linux/arch/arm/boot/dts/k2e-clocks.dtsi
Murali Karicheri 209636b678 ARM: dts: keystone: add support for k2 Edison SoC and EVM
Keystone2 Edison (K2E) is a Quad Cortex A15 based SoC with
1 DSP. It has standard peripherals such as i2c, spi, uart, timer,
pcie, etc similar to k2hk, but without wireless hardwares. This
patch add support for k2 Edison SoC and EVM. This re-uses the common
keystone.dtsi to include common bindings across the various k2
devices.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-02-26 10:06:56 -05:00

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/*
* Copyright 2014 Texas Instruments, Inc.
*
* Keystone 2 Edison SoC specific device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
clocks {
mainpllclk: mainpllclk@2310110 {
#clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock";
clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>;
reg-names = "control", "multiplier";
fixed-postdiv = <2>;
};
papllclk: papllclk@2620358 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkpass>;
clock-output-names = "pa-pll-clk";
reg = <0x02620358 4>;
reg-names = "control";
};
ddr3apllclk: ddr3apllclk@2620360 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkddr3a>;
clock-output-names = "ddr-3a-pll-clk";
reg = <0x02620360 4>;
reg-names = "control";
};
clkusb1: clkusb1 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>;
clock-output-names = "usb";
reg = <0x02350004 0xb00>, <0x02350000 0x400>;
reg-names = "control", "domain";
domain-id = <0>;
};
clkhyperlink0: clkhyperlink0 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
clock-output-names = "hyperlink-0";
reg = <0x02350030 0xb00>, <0x02350014 0x400>;
reg-names = "control", "domain";
domain-id = <5>;
};
clkpcie1: clkpcie1 {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>;
clock-output-names = "pcie";
reg = <0x0235006c 0xb00>, <0x02350000 0x400>;
reg-names = "control", "domain";
domain-id = <18>;
};
clkxge: clkxge {
#clock-cells = <0>;
compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>;
clock-output-names = "xge";
reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
reg-names = "control", "domain";
domain-id = <29>;
};
};