Ley Foon Tan 4a89c3088f nios2: fix cache coherency issue when debug with gdb ... Remove the end address checking for flushda function. We need to flush each address line for flushda instruction, from start to end address. This is because flushda instruction only flush the cache if tag and line fields are matched. Change to use ldwio instruction (bypass cache) to load the instruction that causing trap. Our interest is the actual instruction that executed by the processor, this should be uncached. Note, EA address might be an userspace cached address. Signed-off-by: Ley Foon Tan <lftan@altera.com>		2015-04-10 11:10:08 +08:00
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boot
configs
include	nios2: add missing ptrace registers defines	2015-04-09 18:28:05 +08:00
kernel	nios2: fix cache coherency issue when debug with gdb	2015-04-10 11:10:08 +08:00
lib
mm	nios2: fix cache coherency issue when debug with gdb	2015-04-10 11:10:08 +08:00
platform
Kconfig
Kconfig.debug
Makefile