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https://github.com/torvalds/linux
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5c64e61bb2
The RZ/A2M EVB has a 48MHz clock attached to USB_X1. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
164 lines
3.3 KiB
Plaintext
164 lines
3.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the RZA2MEVB board
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*
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* Copyright (C) 2018 Renesas Electronics
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*
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*/
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/dts-v1/;
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#include "r7s9210.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
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/ {
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model = "RZA2MEVB";
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compatible = "renesas,rza2mevb", "renesas,r7s9210";
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aliases {
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serial0 = &scif4;
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ethernet0 = ðer0;
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ethernet1 = ðer1;
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};
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chosen {
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bootargs = "ignore_loglevel";
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x00800000>; /* HyperRAM */
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};
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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leds {
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compatible = "gpio-leds";
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red {
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gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>;
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};
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green {
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gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>;
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};
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};
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};
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/* EXTAL */
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&extal_clk {
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clock-frequency = <24000000>; /* 24MHz */
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};
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/* RTC_X1 */
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&rtc_x1_clk {
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clock-frequency = <32768>;
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};
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/* USB_X1 */
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&usb_x1_clk {
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clock-frequency = <48000000>;
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};
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&pinctrl {
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/* Serial Console */
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scif4_pins: serial4 {
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pinmux = <RZA2_PINMUX(PORT9, 0, 4)>, /* TxD4 */
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<RZA2_PINMUX(PORT9, 1, 4)>; /* RxD4 */
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};
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eth0_pins: eth0 {
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pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */
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<RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */
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<RZA2_PINMUX(PORT6, 2, 7)>, /* RMII0_TXD0 */
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<RZA2_PINMUX(PORT6, 3, 7)>, /* RMII0_TXD1 */
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<RZA2_PINMUX(PORTE, 4, 7)>, /* RMII0_CRSDV */
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<RZA2_PINMUX(PORTE, 1, 7)>, /* RMII0_RXD0 */
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<RZA2_PINMUX(PORTE, 2, 7)>, /* RMII0_RXD1 */
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<RZA2_PINMUX(PORTE, 3, 7)>, /* RMII0_RXER */
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<RZA2_PINMUX(PORTE, 5, 1)>, /* ET0_MDC */
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<RZA2_PINMUX(PORTE, 6, 1)>, /* ET0_MDIO */
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<RZA2_PINMUX(PORTL, 0, 5)>; /* IRQ4 */
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};
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eth1_pins: eth1 {
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pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */
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<RZA2_PINMUX(PORTK, 0, 7)>, /* RMMI1_TXDEN */
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<RZA2_PINMUX(PORTK, 1, 7)>, /* RMII1_TXD0 */
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<RZA2_PINMUX(PORTK, 2, 7)>, /* RMII1_TXD1 */
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<RZA2_PINMUX(PORT3, 2, 7)>, /* RMII1_CRSDV */
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<RZA2_PINMUX(PORTK, 4, 7)>, /* RMII1_RXD0 */
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<RZA2_PINMUX(PORT3, 5, 7)>, /* RMII1_RXD1 */
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<RZA2_PINMUX(PORT3, 1, 7)>, /* RMII1_RXER */
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<RZA2_PINMUX(PORT3, 3, 1)>, /* ET1_MDC */
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<RZA2_PINMUX(PORT3, 4, 1)>, /* ET1_MDIO */
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<RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */
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};
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sdhi0_pins: sdhi0 {
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pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */
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<RZA2_PINMUX(PORT5, 1, 3)>; /* SD0_WP */
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};
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sdhi1_pins: sdhi1 {
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pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */
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<RZA2_PINMUX(PORT5, 5, 3)>; /* SD1_WP */
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};
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};
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/* High resolution System tick timers */
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&ostm0 {
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status = "okay";
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};
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&ostm1 {
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status = "okay";
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};
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/* Serial Console */
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&scif4 {
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pinctrl-names = "default";
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pinctrl-0 = <&scif4_pins>;
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status = "okay";
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};
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ðer0 {
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pinctrl-names = "default";
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pinctrl-0 = <ð0_pins>;
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status = "okay";
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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ðer1 {
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pinctrl-names = "default";
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pinctrl-0 = <ð1_pins>;
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status = "okay";
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renesas,no-ether-link;
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phy-handle = <&phy1>;
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phy1: ethernet-phy@1 {
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reg = <0>;
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};
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};
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&sdhi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdhi0_pins>;
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bus-width = <4>;
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status = "okay";
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};
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&sdhi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdhi1_pins>;
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bus-width = <4>;
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status = "okay";
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};
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