linux/arch/arm/boot/dts/tegra20-trimslice.dts
Olof Johansson 5b22c33e8e ARM: tegra: device tree updates
Numerous updates to the various Tegra device trees are made:
 
 * Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris
   carrier boards.
 * Enablement of the HDMI connector on most boards.
 * Enablement of the keyboard controller on a few boards.
 * Addition of the AC'97 controller to Tegra20.
 * Addition of a GPIO poweroff node for TrimSlice.
 * Changes to support the new "high speed UART" (DMA-capable) driver for
   Tegra serial ports, and enablement for Cardhu's UART C.
 * A few cleanups, such as compatible flag fixes, node renames, node
   ordering fixes, commonizing properties into SoC .dtsi files, etc..
 
 This pull request is based on (most of) the previous pull request with
 tag tegra-for-3.9-soc-t114.
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Merge tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt

From Stephen Warren:
ARM: tegra: device tree updates

Numerous updates to the various Tegra device trees are made:

* Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris
  carrier boards.
* Enablement of the HDMI connector on most boards.
* Enablement of the keyboard controller on a few boards.
* Addition of the AC'97 controller to Tegra20.
* Addition of a GPIO poweroff node for TrimSlice.
* Changes to support the new "high speed UART" (DMA-capable) driver for
  Tegra serial ports, and enablement for Cardhu's UART C.
* A few cleanups, such as compatible flag fixes, node renames, node
  ordering fixes, commonizing properties into SoC .dtsi files, etc..

This pull request is based on (most of) the previous pull request with
tag tegra-for-3.9-soc-t114.

* tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (22 commits)
  ARM: dt: tegra30: Rename "smmu" to "iommu"
  ARM: dt: tegra20: Rename "gart" to "iommu"
  ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
  ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM
  ARM: tegra: Add Colibri T20 512MB COM device tree
  ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
  ARM: tegra: harmony: enable keyboard in DT
  ARM: tegra: whistler: enable keyboard in DT
  ARM: tegra: cardhu: register UARTC
  ARM: tegra: seaboard: enable keyboard in DT
  ARM: tegra: add DT entry for KBC controller
  ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT
  ASoC: tegra: add ac97 host controller to device tree
  ARM: DT: tegra: Add Tegra30 Beaver board support
  ARM: DT: tegra: Add board level compatible properties
  ARM: tegra: paz00: enable HDMI port
  ARM: tegra: ventana: enable HDMI port
  ARM: tegra: seaboard: enable HDMI port
  ARM: tegra: trimslice: add gpio-poweroff node to DT
  ARM: DT: tegra: Unify the description of Tegra20 boards
  ...
2013-02-05 13:19:11 -08:00

368 lines
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/dts-v1/;
/include/ "tegra20.dtsi"
/ {
model = "Compulab TrimSlice board";
compatible = "compulab,trimslice", "nvidia,tegra20";
memory {
reg = <0x00000000 0x40000000>;
};
host1x {
hdmi {
status = "okay";
vdd-supply = <&hdmi_vdd_reg>;
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
};
};
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
ata {
nvidia,pins = "ata";
nvidia,function = "ide";
};
atb {
nvidia,pins = "atb", "gma";
nvidia,function = "sdio4";
};
atc {
nvidia,pins = "atc", "gmb";
nvidia,function = "nand";
};
atd {
nvidia,pins = "atd", "ate", "gme", "pta";
nvidia,function = "gmi";
};
cdev1 {
nvidia,pins = "cdev1";
nvidia,function = "plla_out";
};
cdev2 {
nvidia,pins = "cdev2";
nvidia,function = "pllp_out4";
};
crtp {
nvidia,pins = "crtp";
nvidia,function = "crt";
};
csus {
nvidia,pins = "csus";
nvidia,function = "vi_sensor_clk";
};
dap1 {
nvidia,pins = "dap1";
nvidia,function = "dap1";
};
dap2 {
nvidia,pins = "dap2";
nvidia,function = "dap2";
};
dap3 {
nvidia,pins = "dap3";
nvidia,function = "dap3";
};
dap4 {
nvidia,pins = "dap4";
nvidia,function = "dap4";
};
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
};
dta {
nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
nvidia,function = "vi";
};
dtf {
nvidia,pins = "dtf";
nvidia,function = "i2c3";
};
gmc {
nvidia,pins = "gmc", "gmd";
nvidia,function = "sflash";
};
gpu {
nvidia,pins = "gpu";
nvidia,function = "uarta";
};
gpu7 {
nvidia,pins = "gpu7";
nvidia,function = "rtck";
};
gpv {
nvidia,pins = "gpv", "slxa", "slxk";
nvidia,function = "pcie";
};
hdint {
nvidia,pins = "hdint";
nvidia,function = "hdmi";
};
i2cp {
nvidia,pins = "i2cp";
nvidia,function = "i2cp";
};
irrx {
nvidia,pins = "irrx", "irtx";
nvidia,function = "uartb";
};
kbca {
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
"kbce", "kbcf";
nvidia,function = "kbc";
};
lcsn {
nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
"ld3", "ld4", "ld5", "ld6", "ld7",
"ld8", "ld9", "ld10", "ld11", "ld12",
"ld13", "ld14", "ld15", "ld16", "ld17",
"ldc", "ldi", "lhp0", "lhp1", "lhp2",
"lhs", "lm0", "lm1", "lpp", "lpw0",
"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
"lsda", "lsdi", "lspi", "lvp0", "lvp1",
"lvs";
nvidia,function = "displaya";
};
owc {
nvidia,pins = "owc", "uac";
nvidia,function = "rsvd2";
};
pmc {
nvidia,pins = "pmc";
nvidia,function = "pwr_on";
};
rm {
nvidia,pins = "rm";
nvidia,function = "i2c1";
};
sdb {
nvidia,pins = "sdb", "sdc", "sdd";
nvidia,function = "pwm";
};
sdio1 {
nvidia,pins = "sdio1";
nvidia,function = "sdio1";
};
slxc {
nvidia,pins = "slxc", "slxd";
nvidia,function = "sdio3";
};
spdi {
nvidia,pins = "spdi", "spdo";
nvidia,function = "spdif";
};
spia {
nvidia,pins = "spia", "spib", "spic";
nvidia,function = "spi2";
};
spid {
nvidia,pins = "spid", "spie", "spif";
nvidia,function = "spi1";
};
spig {
nvidia,pins = "spig", "spih";
nvidia,function = "spi2_alt";
};
uaa {
nvidia,pins = "uaa", "uab", "uda";
nvidia,function = "ulpi";
};
uad {
nvidia,pins = "uad";
nvidia,function = "irda";
};
uca {
nvidia,pins = "uca", "ucb";
nvidia,function = "uartc";
};
conf_ata {
nvidia,pins = "ata", "atc", "atd", "ate",
"crtp", "dap2", "dap3", "dap4", "dta",
"dtb", "dtc", "dtd", "dte", "gmb",
"gme", "i2cp", "pta", "slxc", "slxd",
"spdi", "spdo", "uda";
nvidia,pull = <0>;
nvidia,tristate = <1>;
};
conf_atb {
nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
"gma", "gmc", "gmd", "gpu", "gpu7",
"gpv", "sdio1", "slxa", "slxk", "uac";
nvidia,pull = <0>;
nvidia,tristate = <0>;
};
conf_ck32 {
nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
nvidia,pull = <0>;
};
conf_csus {
nvidia,pins = "csus", "spia", "spib",
"spid", "spif";
nvidia,pull = <1>;
nvidia,tristate = <1>;
};
conf_ddc {
nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
nvidia,pull = <2>;
nvidia,tristate = <0>;
};
conf_hdint {
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
"lpw1", "lsc1", "lsck", "lsda", "lsdi",
"lvp0", "pmc";
nvidia,tristate = <1>;
};
conf_irrx {
nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
"kbcc", "kbcd", "kbce", "kbcf", "owc",
"spic", "spie", "spig", "spih", "uaa",
"uab", "uad", "uca", "ucb";
nvidia,pull = <2>;
nvidia,tristate = <1>;
};
conf_lc {
nvidia,pins = "lc", "ls";
nvidia,pull = <2>;
};
conf_ld0 {
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
"ld5", "ld6", "ld7", "ld8", "ld9",
"ld10", "ld11", "ld12", "ld13", "ld14",
"ld15", "ld16", "ld17", "ldi", "lhp0",
"lhp1", "lhp2", "lhs", "lm0", "lpp",
"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
"lvs", "sdb";
nvidia,tristate = <0>;
};
conf_ld17_0 {
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
"ld23_22";
nvidia,pull = <1>;
};
conf_spif {
nvidia,pins = "spif";
nvidia,pull = <1>;
nvidia,tristate = <0>;
};
};
};
i2s@70002800 {
status = "okay";
};
serial@70006000 {
status = "okay";
};
dvi_ddc: i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
spi@7000c380 {
status = "okay";
spi-max-frequency = <48000000>;
spi-flash@0 {
compatible = "winbond,w25q80bl";
reg = <0>;
spi-max-frequency = <48000000>;
};
};
hdmi_ddc: i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
codec: codec@1a {
compatible = "ti,tlv320aic23";
reg = <0x1a>;
};
rtc@56 {
compatible = "emmicro,em3027";
reg = <0x56>;
};
};
usb@c5000000 {
status = "okay";
nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */
};
usb@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
};
usb@c5008000 {
status = "okay";
};
usb-phy@c5004400 {
nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
};
sdhci@c8000000 {
status = "okay";
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
cd-gpios = <&gpio 121 0>; /* gpio PP1 */
wp-gpios = <&gpio 122 0>; /* gpio PP2 */
bus-width = <4>;
};
poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio 191 1>; /* gpio PX7, active low */
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
hdmi_vdd_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "avdd_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
hdmi_pll_reg: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "avdd_hdmi_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
sound {
compatible = "nvidia,tegra-audio-trimslice";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&codec>;
};
};