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![Andrii Nakryiko](/assets/img/avatar_default.png)
Add a new BPF instruction for resolving absolute addresses of per-CPU data from their per-CPU offsets. This instruction is internal-only and users are not allowed to use them directly. They will only be used for internal inlining optimizations for now between BPF verifier and BPF JITs. We use a special BPF_MOV | BPF_ALU64 | BPF_X form with insn->off field set to BPF_ADDR_PERCPU = -1. I used negative offset value to distinguish them from positive ones used by user-exposed instructions. Such instruction performs a resolution of a per-CPU offset stored in a register to a valid kernel address which can be dereferenced. It is useful in any use case where absolute address of a per-CPU data has to be resolved (e.g., in inlining bpf_map_lookup_elem()). BPF disassembler is also taught to recognize them to support dumping final BPF assembly code (non-JIT'ed version). Add arch-specific way for BPF JITs to mark support for this instructions. This patch also adds support for these instructions in x86-64 BPF JIT. Signed-off-by: Andrii Nakryiko <andrii@kernel.org> Acked-by: John Fastabend <john.fastabend@gmail.com> Link: https://lore.kernel.org/r/20240402021307.1012571-2-andrii@kernel.org Signed-off-by: Alexei Starovoitov <ast@kernel.org>
379 lines
12 KiB
C
379 lines
12 KiB
C
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/* Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
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* Copyright (c) 2016 Facebook
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*/
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#include <linux/bpf.h>
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#include "disasm.h"
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#define __BPF_FUNC_STR_FN(x) [BPF_FUNC_ ## x] = __stringify(bpf_ ## x)
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static const char * const func_id_str[] = {
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__BPF_FUNC_MAPPER(__BPF_FUNC_STR_FN)
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};
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#undef __BPF_FUNC_STR_FN
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static const char *__func_get_name(const struct bpf_insn_cbs *cbs,
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const struct bpf_insn *insn,
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char *buff, size_t len)
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{
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BUILD_BUG_ON(ARRAY_SIZE(func_id_str) != __BPF_FUNC_MAX_ID);
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if (!insn->src_reg &&
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insn->imm >= 0 && insn->imm < __BPF_FUNC_MAX_ID &&
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func_id_str[insn->imm])
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return func_id_str[insn->imm];
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if (cbs && cbs->cb_call) {
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const char *res;
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res = cbs->cb_call(cbs->private_data, insn);
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if (res)
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return res;
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}
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if (insn->src_reg == BPF_PSEUDO_CALL)
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snprintf(buff, len, "%+d", insn->imm);
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else if (insn->src_reg == BPF_PSEUDO_KFUNC_CALL)
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snprintf(buff, len, "kernel-function");
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return buff;
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}
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static const char *__func_imm_name(const struct bpf_insn_cbs *cbs,
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const struct bpf_insn *insn,
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u64 full_imm, char *buff, size_t len)
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{
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if (cbs && cbs->cb_imm)
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return cbs->cb_imm(cbs->private_data, insn, full_imm);
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snprintf(buff, len, "0x%llx", (unsigned long long)full_imm);
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return buff;
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}
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const char *func_id_name(int id)
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{
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if (id >= 0 && id < __BPF_FUNC_MAX_ID && func_id_str[id])
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return func_id_str[id];
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else
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return "unknown";
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}
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const char *const bpf_class_string[8] = {
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[BPF_LD] = "ld",
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[BPF_LDX] = "ldx",
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[BPF_ST] = "st",
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[BPF_STX] = "stx",
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[BPF_ALU] = "alu",
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[BPF_JMP] = "jmp",
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[BPF_JMP32] = "jmp32",
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[BPF_ALU64] = "alu64",
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};
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const char *const bpf_alu_string[16] = {
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[BPF_ADD >> 4] = "+=",
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[BPF_SUB >> 4] = "-=",
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[BPF_MUL >> 4] = "*=",
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[BPF_DIV >> 4] = "/=",
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[BPF_OR >> 4] = "|=",
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[BPF_AND >> 4] = "&=",
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[BPF_LSH >> 4] = "<<=",
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[BPF_RSH >> 4] = ">>=",
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[BPF_NEG >> 4] = "neg",
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[BPF_MOD >> 4] = "%=",
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[BPF_XOR >> 4] = "^=",
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[BPF_MOV >> 4] = "=",
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[BPF_ARSH >> 4] = "s>>=",
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[BPF_END >> 4] = "endian",
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};
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static const char *const bpf_alu_sign_string[16] = {
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[BPF_DIV >> 4] = "s/=",
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[BPF_MOD >> 4] = "s%=",
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};
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static const char *const bpf_movsx_string[4] = {
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[0] = "(s8)",
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[1] = "(s16)",
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[3] = "(s32)",
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};
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static const char *const bpf_atomic_alu_string[16] = {
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[BPF_ADD >> 4] = "add",
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[BPF_AND >> 4] = "and",
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[BPF_OR >> 4] = "or",
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[BPF_XOR >> 4] = "xor",
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};
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static const char *const bpf_ldst_string[] = {
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[BPF_W >> 3] = "u32",
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[BPF_H >> 3] = "u16",
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[BPF_B >> 3] = "u8",
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[BPF_DW >> 3] = "u64",
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};
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static const char *const bpf_ldsx_string[] = {
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[BPF_W >> 3] = "s32",
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[BPF_H >> 3] = "s16",
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[BPF_B >> 3] = "s8",
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};
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static const char *const bpf_jmp_string[16] = {
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[BPF_JA >> 4] = "jmp",
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[BPF_JEQ >> 4] = "==",
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[BPF_JGT >> 4] = ">",
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[BPF_JLT >> 4] = "<",
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[BPF_JGE >> 4] = ">=",
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[BPF_JLE >> 4] = "<=",
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[BPF_JSET >> 4] = "&",
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[BPF_JNE >> 4] = "!=",
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[BPF_JSGT >> 4] = "s>",
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[BPF_JSLT >> 4] = "s<",
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[BPF_JSGE >> 4] = "s>=",
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[BPF_JSLE >> 4] = "s<=",
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[BPF_CALL >> 4] = "call",
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[BPF_EXIT >> 4] = "exit",
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};
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static void print_bpf_end_insn(bpf_insn_print_t verbose,
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void *private_data,
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const struct bpf_insn *insn)
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{
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verbose(private_data, "(%02x) r%d = %s%d r%d\n",
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insn->code, insn->dst_reg,
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BPF_SRC(insn->code) == BPF_TO_BE ? "be" : "le",
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insn->imm, insn->dst_reg);
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}
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static void print_bpf_bswap_insn(bpf_insn_print_t verbose,
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void *private_data,
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const struct bpf_insn *insn)
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{
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verbose(private_data, "(%02x) r%d = bswap%d r%d\n",
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insn->code, insn->dst_reg,
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insn->imm, insn->dst_reg);
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}
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static bool is_sdiv_smod(const struct bpf_insn *insn)
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{
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return (BPF_OP(insn->code) == BPF_DIV || BPF_OP(insn->code) == BPF_MOD) &&
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insn->off == 1;
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}
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static bool is_movsx(const struct bpf_insn *insn)
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{
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return BPF_OP(insn->code) == BPF_MOV &&
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(insn->off == 8 || insn->off == 16 || insn->off == 32);
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}
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static bool is_addr_space_cast(const struct bpf_insn *insn)
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{
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return insn->code == (BPF_ALU64 | BPF_MOV | BPF_X) &&
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insn->off == BPF_ADDR_SPACE_CAST;
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}
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/* Special (internal-only) form of mov, used to resolve per-CPU addrs:
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* dst_reg = src_reg + <percpu_base_off>
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* BPF_ADDR_PERCPU is used as a special insn->off value.
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*/
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#define BPF_ADDR_PERCPU (-1)
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static inline bool is_mov_percpu_addr(const struct bpf_insn *insn)
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{
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return insn->code == (BPF_ALU64 | BPF_MOV | BPF_X) && insn->off == BPF_ADDR_PERCPU;
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}
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void print_bpf_insn(const struct bpf_insn_cbs *cbs,
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const struct bpf_insn *insn,
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bool allow_ptr_leaks)
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{
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const bpf_insn_print_t verbose = cbs->cb_print;
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u8 class = BPF_CLASS(insn->code);
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if (class == BPF_ALU || class == BPF_ALU64) {
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if (BPF_OP(insn->code) == BPF_END) {
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if (class == BPF_ALU64)
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print_bpf_bswap_insn(verbose, cbs->private_data, insn);
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else
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print_bpf_end_insn(verbose, cbs->private_data, insn);
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} else if (BPF_OP(insn->code) == BPF_NEG) {
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verbose(cbs->private_data, "(%02x) %c%d = -%c%d\n",
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insn->code, class == BPF_ALU ? 'w' : 'r',
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insn->dst_reg, class == BPF_ALU ? 'w' : 'r',
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insn->dst_reg);
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} else if (is_addr_space_cast(insn)) {
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verbose(cbs->private_data, "(%02x) r%d = addr_space_cast(r%d, %d, %d)\n",
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insn->code, insn->dst_reg,
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insn->src_reg, ((u32)insn->imm) >> 16, (u16)insn->imm);
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} else if (is_mov_percpu_addr(insn)) {
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verbose(cbs->private_data, "(%02x) r%d = &(void __percpu *)(r%d)\n",
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insn->code, insn->dst_reg, insn->src_reg);
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} else if (BPF_SRC(insn->code) == BPF_X) {
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verbose(cbs->private_data, "(%02x) %c%d %s %s%c%d\n",
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insn->code, class == BPF_ALU ? 'w' : 'r',
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insn->dst_reg,
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is_sdiv_smod(insn) ? bpf_alu_sign_string[BPF_OP(insn->code) >> 4]
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: bpf_alu_string[BPF_OP(insn->code) >> 4],
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is_movsx(insn) ? bpf_movsx_string[(insn->off >> 3) - 1] : "",
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class == BPF_ALU ? 'w' : 'r',
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insn->src_reg);
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} else {
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verbose(cbs->private_data, "(%02x) %c%d %s %d\n",
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insn->code, class == BPF_ALU ? 'w' : 'r',
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insn->dst_reg,
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is_sdiv_smod(insn) ? bpf_alu_sign_string[BPF_OP(insn->code) >> 4]
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: bpf_alu_string[BPF_OP(insn->code) >> 4],
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insn->imm);
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}
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} else if (class == BPF_STX) {
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if (BPF_MODE(insn->code) == BPF_MEM)
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verbose(cbs->private_data, "(%02x) *(%s *)(r%d %+d) = r%d\n",
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insn->code,
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg,
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insn->off, insn->src_reg);
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else if (BPF_MODE(insn->code) == BPF_ATOMIC &&
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(insn->imm == BPF_ADD || insn->imm == BPF_AND ||
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insn->imm == BPF_OR || insn->imm == BPF_XOR)) {
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verbose(cbs->private_data, "(%02x) lock *(%s *)(r%d %+d) %s r%d\n",
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insn->code,
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off,
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bpf_alu_string[BPF_OP(insn->imm) >> 4],
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insn->src_reg);
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} else if (BPF_MODE(insn->code) == BPF_ATOMIC &&
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(insn->imm == (BPF_ADD | BPF_FETCH) ||
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insn->imm == (BPF_AND | BPF_FETCH) ||
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insn->imm == (BPF_OR | BPF_FETCH) ||
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insn->imm == (BPF_XOR | BPF_FETCH))) {
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verbose(cbs->private_data, "(%02x) r%d = atomic%s_fetch_%s((%s *)(r%d %+d), r%d)\n",
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insn->code, insn->src_reg,
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BPF_SIZE(insn->code) == BPF_DW ? "64" : "",
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bpf_atomic_alu_string[BPF_OP(insn->imm) >> 4],
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off, insn->src_reg);
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} else if (BPF_MODE(insn->code) == BPF_ATOMIC &&
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insn->imm == BPF_CMPXCHG) {
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verbose(cbs->private_data, "(%02x) r0 = atomic%s_cmpxchg((%s *)(r%d %+d), r0, r%d)\n",
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insn->code,
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BPF_SIZE(insn->code) == BPF_DW ? "64" : "",
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off,
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insn->src_reg);
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} else if (BPF_MODE(insn->code) == BPF_ATOMIC &&
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insn->imm == BPF_XCHG) {
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verbose(cbs->private_data, "(%02x) r%d = atomic%s_xchg((%s *)(r%d %+d), r%d)\n",
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insn->code, insn->src_reg,
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BPF_SIZE(insn->code) == BPF_DW ? "64" : "",
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg, insn->off, insn->src_reg);
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} else {
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verbose(cbs->private_data, "BUG_%02x\n", insn->code);
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}
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} else if (class == BPF_ST) {
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if (BPF_MODE(insn->code) == BPF_MEM) {
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verbose(cbs->private_data, "(%02x) *(%s *)(r%d %+d) = %d\n",
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insn->code,
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->dst_reg,
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insn->off, insn->imm);
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} else if (BPF_MODE(insn->code) == 0xc0 /* BPF_NOSPEC, no UAPI */) {
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verbose(cbs->private_data, "(%02x) nospec\n", insn->code);
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} else {
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verbose(cbs->private_data, "BUG_st_%02x\n", insn->code);
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}
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} else if (class == BPF_LDX) {
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if (BPF_MODE(insn->code) != BPF_MEM && BPF_MODE(insn->code) != BPF_MEMSX) {
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verbose(cbs->private_data, "BUG_ldx_%02x\n", insn->code);
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return;
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}
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verbose(cbs->private_data, "(%02x) r%d = *(%s *)(r%d %+d)\n",
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insn->code, insn->dst_reg,
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BPF_MODE(insn->code) == BPF_MEM ?
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3] :
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bpf_ldsx_string[BPF_SIZE(insn->code) >> 3],
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insn->src_reg, insn->off);
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} else if (class == BPF_LD) {
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if (BPF_MODE(insn->code) == BPF_ABS) {
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verbose(cbs->private_data, "(%02x) r0 = *(%s *)skb[%d]\n",
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insn->code,
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->imm);
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} else if (BPF_MODE(insn->code) == BPF_IND) {
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verbose(cbs->private_data, "(%02x) r0 = *(%s *)skb[r%d + %d]\n",
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insn->code,
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bpf_ldst_string[BPF_SIZE(insn->code) >> 3],
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insn->src_reg, insn->imm);
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} else if (BPF_MODE(insn->code) == BPF_IMM &&
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BPF_SIZE(insn->code) == BPF_DW) {
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/* At this point, we already made sure that the second
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* part of the ldimm64 insn is accessible.
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*/
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u64 imm = ((u64)(insn + 1)->imm << 32) | (u32)insn->imm;
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bool is_ptr = insn->src_reg == BPF_PSEUDO_MAP_FD ||
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insn->src_reg == BPF_PSEUDO_MAP_VALUE;
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char tmp[64];
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if (is_ptr && !allow_ptr_leaks)
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imm = 0;
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verbose(cbs->private_data, "(%02x) r%d = %s\n",
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insn->code, insn->dst_reg,
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__func_imm_name(cbs, insn, imm,
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tmp, sizeof(tmp)));
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} else {
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verbose(cbs->private_data, "BUG_ld_%02x\n", insn->code);
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return;
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}
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} else if (class == BPF_JMP32 || class == BPF_JMP) {
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u8 opcode = BPF_OP(insn->code);
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if (opcode == BPF_CALL) {
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char tmp[64];
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if (insn->src_reg == BPF_PSEUDO_CALL) {
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verbose(cbs->private_data, "(%02x) call pc%s\n",
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insn->code,
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__func_get_name(cbs, insn,
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tmp, sizeof(tmp)));
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} else {
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strcpy(tmp, "unknown");
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verbose(cbs->private_data, "(%02x) call %s#%d\n", insn->code,
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__func_get_name(cbs, insn,
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tmp, sizeof(tmp)),
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insn->imm);
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}
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} else if (insn->code == (BPF_JMP | BPF_JA)) {
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verbose(cbs->private_data, "(%02x) goto pc%+d\n",
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insn->code, insn->off);
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} else if (insn->code == (BPF_JMP | BPF_JCOND) &&
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insn->src_reg == BPF_MAY_GOTO) {
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verbose(cbs->private_data, "(%02x) may_goto pc%+d\n",
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insn->code, insn->off);
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} else if (insn->code == (BPF_JMP32 | BPF_JA)) {
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verbose(cbs->private_data, "(%02x) gotol pc%+d\n",
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insn->code, insn->imm);
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} else if (insn->code == (BPF_JMP | BPF_EXIT)) {
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verbose(cbs->private_data, "(%02x) exit\n", insn->code);
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} else if (BPF_SRC(insn->code) == BPF_X) {
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verbose(cbs->private_data,
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"(%02x) if %c%d %s %c%d goto pc%+d\n",
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insn->code, class == BPF_JMP32 ? 'w' : 'r',
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insn->dst_reg,
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bpf_jmp_string[BPF_OP(insn->code) >> 4],
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class == BPF_JMP32 ? 'w' : 'r',
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insn->src_reg, insn->off);
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} else {
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verbose(cbs->private_data,
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"(%02x) if %c%d %s 0x%x goto pc%+d\n",
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insn->code, class == BPF_JMP32 ? 'w' : 'r',
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insn->dst_reg,
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bpf_jmp_string[BPF_OP(insn->code) >> 4],
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insn->imm, insn->off);
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}
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} else {
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verbose(cbs->private_data, "(%02x) %s\n",
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insn->code, bpf_class_string[class]);
|
|
}
|
|
}
|