Lucas Stach b798d5a1b0 soc: imx: gpcv2: handle additional power-down bits in handshake register ... Some of the i.MX8MQ domains have an additional control bit in the PU handshake (HSK) register. Documentation about this bit is a bit sparse at the moment, but it seems that it controls a power-down request to the AMBA domain bridge (ADB-400) attached to those domains. As the documentation doesn't desribe the usage of this bit yet, handle it in the same way as done in the ATF implementation. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2019-01-11 15:12:38 +08:00
..
gpc.c	soc: imx: gpc: Increase GPC_CLK_MAX to 7	2018-12-10 08:51:12 +08:00
gpcv2.c	soc: imx: gpcv2: handle additional power-down bits in handshake register	2019-01-11 15:12:38 +08:00
Kconfig	soc: imx: gpcv2: add support for i.MX8MQ SoC	2018-12-05 08:50:36 +08:00
Makefile	soc: imx: gpcv2: add support for i.MX8MQ SoC	2018-12-05 08:50:36 +08:00