Eugene Korenevsky e9ac033e6b KVM: nVMX: Improve nested msr switch checking ... This patch improve checks required by Intel Software Developer Manual. - SMM MSRs are not allowed. - microcode MSRs are not allowed. - check x2apic MSRs only when LAPIC is in x2apic mode. - MSR switch areas must be aligned to 16 bytes. - address of first and last byte in MSR switch areas should not set any bits beyond the processor's physical-address width. Also it adds warning messages on failures during MSR switch. These messages are useful for people who debug their VMMs in nVMX. Signed-off-by: Eugene Korenevsky <ekorenevsky@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2015-01-08 22:45:15 +01:00
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asm	kernel: Provide READ_ONCE and ASSIGN_ONCE	2014-12-20 16:48:59 -08:00
uapi/asm	KVM: nVMX: Improve nested msr switch checking	2015-01-08 22:45:15 +01:00