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5dd33d89f4
This patch moves S5P6440 GPIO support files from mach-s5p6440 into the new mach-s5p64x0 for merge S5P6440 and S5P6450 SocS. NOTE: Not supported S5P6450 GPIO yet. Will be supported soon. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
63 lines
2 KiB
C
63 lines
2 KiB
C
/* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
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*
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* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* S5P64X0 - GPIO register definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_REGS_GPIO_H
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#define __ASM_ARCH_REGS_GPIO_H __FILE__
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#include <mach/map.h>
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/* Will be implemented S5P6442 GPIOlib */
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/* Base addresses for each of the banks */
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#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
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#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
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#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
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#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0)
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#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0)
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#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0)
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#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100)
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#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120)
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#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
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#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
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#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
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#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
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#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
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#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
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#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920)
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#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
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/* for LCD */
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#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
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#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
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/*
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* These set of macros are not really useful for the
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* GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit)
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*/
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#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
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#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
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#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
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/*
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* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
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*/
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#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
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#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
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#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
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#endif /* __ASM_ARCH_REGS_GPIO_H */
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