linux/arch/riscv/boot
William Qiu af571133f7 riscv: dts: starfive: add assigned-clock* to limit frquency
In JH7110 SoC, we need to go by-pass mode, so we need add the
assigned-clock* properties to limit clock frquency.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-09-30 09:58:30 +01:00
..
dts riscv: dts: starfive: add assigned-clock* to limit frquency 2023-09-30 09:58:30 +01:00
.gitignore riscv: efi: enable generic EFI compressed boot 2022-09-20 09:50:30 +02:00
install.sh kbuild: factor out the common installation code into scripts/install.sh 2022-05-11 21:45:53 +09:00
loader.lds.S riscv: Move kernel mapping outside of linear mapping 2021-04-26 08:25:04 -07:00
loader.S riscv: provide a flat image loader 2019-11-17 15:17:39 -08:00
Makefile riscv: Use --emit-relocs in order to move .rela.dyn in init 2023-04-19 07:46:33 -07:00