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4a4a79c06c
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 56ca9db862 ("iio: dac: Add support for the AD5592R/AD5593R ADCs/DACs")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Paul Cercueil <paul@crapouillou.net>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-49-jic23@kernel.org
78 lines
2 KiB
C
78 lines
2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AD5592R / AD5593R Digital <-> Analog converters driver
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*
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* Copyright 2015-2016 Analog Devices Inc.
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* Author: Paul Cercueil <paul.cercueil@analog.com>
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*/
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#ifndef __DRIVERS_IIO_DAC_AD5592R_BASE_H__
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#define __DRIVERS_IIO_DAC_AD5592R_BASE_H__
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#include <linux/types.h>
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#include <linux/cache.h>
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#include <linux/mutex.h>
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#include <linux/gpio/driver.h>
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#include <linux/iio/iio.h>
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struct device;
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struct ad5592r_state;
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enum ad5592r_registers {
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AD5592R_REG_NOOP = 0x0,
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AD5592R_REG_DAC_READBACK = 0x1,
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AD5592R_REG_ADC_SEQ = 0x2,
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AD5592R_REG_CTRL = 0x3,
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AD5592R_REG_ADC_EN = 0x4,
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AD5592R_REG_DAC_EN = 0x5,
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AD5592R_REG_PULLDOWN = 0x6,
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AD5592R_REG_LDAC = 0x7,
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AD5592R_REG_GPIO_OUT_EN = 0x8,
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AD5592R_REG_GPIO_SET = 0x9,
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AD5592R_REG_GPIO_IN_EN = 0xA,
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AD5592R_REG_PD = 0xB,
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AD5592R_REG_OPEN_DRAIN = 0xC,
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AD5592R_REG_TRISTATE = 0xD,
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AD5592R_REG_RESET = 0xF,
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};
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#define AD5592R_REG_PD_EN_REF BIT(9)
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#define AD5592R_REG_CTRL_ADC_RANGE BIT(5)
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#define AD5592R_REG_CTRL_DAC_RANGE BIT(4)
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struct ad5592r_rw_ops {
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int (*write_dac)(struct ad5592r_state *st, unsigned chan, u16 value);
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int (*read_adc)(struct ad5592r_state *st, unsigned chan, u16 *value);
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int (*reg_write)(struct ad5592r_state *st, u8 reg, u16 value);
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int (*reg_read)(struct ad5592r_state *st, u8 reg, u16 *value);
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int (*gpio_read)(struct ad5592r_state *st, u8 *value);
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};
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struct ad5592r_state {
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struct device *dev;
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struct regulator *reg;
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struct gpio_chip gpiochip;
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struct mutex gpio_lock; /* Protect cached gpio_out, gpio_val, etc. */
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struct mutex lock;
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unsigned int num_channels;
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const struct ad5592r_rw_ops *ops;
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int scale_avail[2][2];
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u16 cached_dac[8];
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u16 cached_gp_ctrl;
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u8 channel_modes[8];
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u8 channel_offstate[8];
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u8 gpio_map;
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u8 gpio_out;
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u8 gpio_in;
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u8 gpio_val;
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__be16 spi_msg __aligned(IIO_DMA_MINALIGN);
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__be16 spi_msg_nop;
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};
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int ad5592r_probe(struct device *dev, const char *name,
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const struct ad5592r_rw_ops *ops);
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void ad5592r_remove(struct device *dev);
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#endif /* __DRIVERS_IIO_DAC_AD5592R_BASE_H__ */
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