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4ede316170
Document that CPC core-other accesses must take place within the bounds of the CM lock, and begin using the CM lock functions where we access the GCRs of other cores. This is required because with CM3 the CPC began using GCR_CL_OTHER instead of CPC_CL_OTHER. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-kernel@vger.kernel.org Cc: Niklas Cassel <niklas.cassel@axis.com> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/11208/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
67 lines
1.5 KiB
C
67 lines
1.5 KiB
C
/*
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* Copyright (C) 2013 Imagination Technologies
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* Author: Paul Burton <paul.burton@imgtec.com>
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*
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* Based on smp-cmp.c:
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* Copyright (C) 2007 MIPS Technologies, Inc.
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* Author: Chris Dearman (chris@mips.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/irqchip/mips-gic.h>
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#include <linux/printk.h>
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#include <asm/mips-cpc.h>
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#include <asm/smp-ops.h>
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void gic_send_ipi_single(int cpu, unsigned int action)
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{
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unsigned long flags;
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unsigned int intr;
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unsigned int core = cpu_data[cpu].core;
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pr_debug("CPU%d: %s cpu %d action %u status %08x\n",
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smp_processor_id(), __func__, cpu, action, read_c0_status());
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local_irq_save(flags);
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switch (action) {
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case SMP_CALL_FUNCTION:
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intr = plat_ipi_call_int_xlate(cpu);
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break;
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case SMP_RESCHEDULE_YOURSELF:
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intr = plat_ipi_resched_int_xlate(cpu);
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break;
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default:
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BUG();
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}
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gic_send_ipi(intr);
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if (mips_cpc_present() && (core != current_cpu_data.core)) {
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while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
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mips_cm_lock_other(core, 0);
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mips_cpc_lock_other(core);
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write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
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mips_cpc_unlock_other();
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mips_cm_unlock_other();
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}
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}
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local_irq_restore(flags);
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}
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void gic_send_ipi_mask(const struct cpumask *mask, unsigned int action)
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{
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unsigned int i;
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for_each_cpu(i, mask)
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gic_send_ipi_single(i, action);
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}
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