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220fc35216
Add "renesas,irqc-r8a7790" to the compatible string for IRQC in case of r8a7790. This makes the IRQC follow the same style as the other devices and also makes it more future proof. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
291 lines
6.9 KiB
Plaintext
291 lines
6.9 KiB
Plaintext
/*
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* Device Tree Source for the r8a7790 SoC
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "renesas,r8a7790";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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clock-frequency = <1300000000>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <1>;
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clock-frequency = <1300000000>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <2>;
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clock-frequency = <1300000000>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <3>;
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clock-frequency = <1300000000>;
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};
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cpu4: cpu@4 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x100>;
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clock-frequency = <780000000>;
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};
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cpu5: cpu@5 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x101>;
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clock-frequency = <780000000>;
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};
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cpu6: cpu@6 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x102>;
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clock-frequency = <780000000>;
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};
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cpu7: cpu@7 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x103>;
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clock-frequency = <780000000>;
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};
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};
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gic: interrupt-controller@f1001000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0 0xf1001000 0 0x1000>,
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<0 0xf1002000 0 0x1000>,
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<0 0xf1004000 0 0x2000>,
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<0 0xf1006000 0 0x2000>;
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interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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gpio0: gpio@ffc40000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc40000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 0 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio1: gpio@ffc41000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc41000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 32 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio2: gpio@ffc42000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc42000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 64 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio3: gpio@ffc43000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc43000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 96 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio4: gpio@ffc44000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc44000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 128 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio5: gpio@ffc45000 {
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compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
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reg = <0 0xffc45000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 160 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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thermal@e61f0000 {
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compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
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reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
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interrupt-parent = <&gic>;
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interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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irqc0: interrupt-controller@e61c0000 {
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compatible = "renesas,irqc-r8a7790", "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0 0xe61c0000 0 0x200>;
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interrupt-parent = <&gic>;
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interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
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<0 1 IRQ_TYPE_LEVEL_HIGH>,
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<0 2 IRQ_TYPE_LEVEL_HIGH>,
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<0 3 IRQ_TYPE_LEVEL_HIGH>;
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};
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6508000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c1: i2c@e6518000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6518000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c2: i2c@e6530000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6530000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c3: i2c@e6540000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790";
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reg = <0 0xe6540000 0 0x40>;
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interrupt-parent = <&gic>;
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interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmcif0: mmcif@ee200000 {
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compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
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reg = <0 0xee200000 0 0x80>;
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interrupt-parent = <&gic>;
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interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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status = "disabled";
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};
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mmcif1: mmc@ee220000 {
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compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
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reg = <0 0xee220000 0 0x80>;
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interrupt-parent = <&gic>;
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interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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status = "disabled";
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};
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pfc: pfc@e6060000 {
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compatible = "renesas,pfc-r8a7790";
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reg = <0 0xe6060000 0 0x250>;
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};
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee100000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi1: sd@ee120000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee120000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi2: sd@ee140000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee140000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi3: sd@ee160000 {
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee160000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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status = "disabled";
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};
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};
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