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- Core and platform-MSI The core changes have been adopted from previous work which converted ARM[64] to the new per device MSI domain model, which was merged to support multiple MSI domain per device. The ARM[64] changes are being worked on too, but have not been ready yet. The core and platform-MSI changes have been split out to not hold up RISC-V and to avoid that RISC-V builds on the scheduled for removal interfaces. The core support provides new interfaces to handle wire to MSI bridges in a straight forward way and introduces new platform-MSI interfaces which are built on top of the per device MSI domain model. Once ARM[64] is converted over the old platform-MSI interfaces and the related ugliness in the MSI core code will be removed. - Drivers: - Add a new driver for the Andes hart-level interrupt controller - Rework the SiFive PLIC driver to prepare for MSI suport - Expand the RISC-V INTC driver to support the new RISC-V AIA controller which provides the basis for MSI on RISC-V - A few fixup for the fallout of the core changes. The actual MSI parts for RISC-V were finalized late and have been post-poned for the next merge window. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmXt7MsTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYofrMD/9Dag12ttmbE2uqzTzlTxc7RHC2MX5n VJLt84FNNwGPA4r7WLOOqHrfuvfoGjuWT9pYMrVaXCglRG1CMvL10kHMB2f28UWv Qpc5PzbJwpD6tqyfRSFHMoJp63DAI8IpS7J3I8bqnRD8+0PwYn3jMA1+iMZkH0B7 8uO3mxlFhQ7BFvIAeMEAhR0szuAfvXqEtpi1iTgQTrQ4Je4Rf1pmLjEe2rkwDvF4 p3SAmPIh4+F3IjO7vNsVkQ2yOarTP2cpSns6JmO8mrobLIVX7ZCQ6uVaVCfBhxfx WttuJO6Bmh/I15yDe/waH6q9ym+0VBwYRWi5lonMpViGdq4/D2WVnY1mNeLRIfjl X65aMWE1+bhiqyIIUfc24hacf0UgBIlMEW4kJ31VmQzb+OyLDXw+UvzWg1dO6XdA 3L6j1nRgHk0ea5yFyH6SfH/mrfeyqHuwHqo17KFyHxD3jM2H1RRMplpbwXiOIepp KJJ/O06eMEzHqzn4B8GCT2EvX6L2ehgoWbLeEDNLQh/3LwA9OdcBzPr6gsweEl0U Q7szJgUWZHeMr39F2rnt0GmvkEuu6muEp/nQzfnohjoYZ0PhpMLSq++4Gi+Ko3fz 2IyecJ+tlbSfyM5//8AdNnOSpsTG3f8u6B/WwhGp5lIDwMnMzCssgfQmRnc3Uyv5 kU3pdMjURJaTUA== =7aXj -----END PGP SIGNATURE----- Merge tag 'irq-msi-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull MSI updates from Thomas Gleixner: "Updates for the MSI interrupt subsystem and initial RISC-V MSI support. The core changes have been adopted from previous work which converted ARM[64] to the new per device MSI domain model, which was merged to support multiple MSI domain per device. The ARM[64] changes are being worked on too, but have not been ready yet. The core and platform-MSI changes have been split out to not hold up RISC-V and to avoid that RISC-V builds on the scheduled for removal interfaces. The core support provides new interfaces to handle wire to MSI bridges in a straight forward way and introduces new platform-MSI interfaces which are built on top of the per device MSI domain model. Once ARM[64] is converted over the old platform-MSI interfaces and the related ugliness in the MSI core code will be removed. The actual MSI parts for RISC-V were finalized late and have been post-poned for the next merge window. Drivers: - Add a new driver for the Andes hart-level interrupt controller - Rework the SiFive PLIC driver to prepare for MSI suport - Expand the RISC-V INTC driver to support the new RISC-V AIA controller which provides the basis for MSI on RISC-V - A few fixup for the fallout of the core changes" * tag 'irq-msi-2024-03-10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits) irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA x86/apic/msi: Use DOMAIN_BUS_GENERIC_MSI for HPET/IO-APIC domain search genirq/matrix: Dynamic bitmap allocation irqchip/riscv-intc: Add support for RISC-V AIA irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe() irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode irqchip/sifive-plic: Use devm_xyz() for managed allocation irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz() irqchip/sifive-plic: Convert PLIC driver into a platform driver irqchip/riscv-intc: Introduce Andes hart-level interrupt controller irqchip/riscv-intc: Allow large non-standard interrupt number genirq/irqdomain: Don't call ops->select for DOMAIN_BUS_ANY tokens irqchip/imx-intmux: Handle pure domain searches correctly genirq/msi: Provide MSI_FLAG_PARENT_PM_DEV genirq/irqdomain: Reroute device MSI create_mapping genirq/msi: Provide allocation/free functions for "wired" MSI interrupts genirq/msi: Optionally use dev->fwnode for device domain genirq/msi: Provide DOMAIN_BUS_WIRED_TO_MSI ... |
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.. | ||
bestcomm | ||
dw | ||
dw-axi-dmac | ||
dw-edma | ||
fsl-dpaa2-qdma | ||
hsu | ||
idxd | ||
ioat | ||
lgm | ||
mediatek | ||
ppc4xx | ||
ptdma | ||
qcom | ||
sf-pdma | ||
sh | ||
ti | ||
xilinx | ||
acpi-dma.c | ||
altera-msgdma.c | ||
amba-pl08x.c | ||
apple-admac.c | ||
at_hdmac.c | ||
at_xdmac.c | ||
bcm-sba-raid.c | ||
bcm2835-dma.c | ||
dma-axi-dmac.c | ||
dma-jz4780.c | ||
dmaengine.c | ||
dmaengine.h | ||
dmatest.c | ||
ep93xx_dma.c | ||
fsl-edma-common.c | ||
fsl-edma-common.h | ||
fsl-edma-main.c | ||
fsl-qdma.c | ||
fsl_raid.c | ||
fsl_raid.h | ||
fsldma.c | ||
fsldma.h | ||
hisi_dma.c | ||
idma64.c | ||
idma64.h | ||
img-mdc-dma.c | ||
imx-dma.c | ||
imx-sdma.c | ||
k3dma.c | ||
Kconfig | ||
lpc18xx-dmamux.c | ||
ls2x-apb-dma.c | ||
Makefile | ||
mcf-edma-main.c | ||
milbeaut-hdmac.c | ||
milbeaut-xdmac.c | ||
mmp_pdma.c | ||
mmp_tdma.c | ||
moxart-dma.c | ||
mpc512x_dma.c | ||
mv_xor.c | ||
mv_xor.h | ||
mv_xor_v2.c | ||
mxs-dma.c | ||
nbpfaxi.c | ||
of-dma.c | ||
owl-dma.c | ||
pch_dma.c | ||
pl330.c | ||
plx_dma.c | ||
pxa_dma.c | ||
sa11x0-dma.c | ||
sprd-dma.c | ||
st_fdma.c | ||
st_fdma.h | ||
ste_dma40.c | ||
ste_dma40.h | ||
ste_dma40_ll.c | ||
ste_dma40_ll.h | ||
stm32-dma.c | ||
stm32-dmamux.c | ||
stm32-mdma.c | ||
sun4i-dma.c | ||
sun6i-dma.c | ||
tegra20-apb-dma.c | ||
tegra186-gpc-dma.c | ||
tegra210-adma.c | ||
timb_dma.c | ||
TODO | ||
txx9dmac.c | ||
txx9dmac.h | ||
uniphier-mdmac.c | ||
uniphier-xdmac.c | ||
virt-dma.c | ||
virt-dma.h | ||
xgene-dma.c |