mirror of
https://github.com/torvalds/linux
synced 2024-09-30 00:10:51 +00:00
12108aa8c1
Simplify memset() on the x86-64 arch.
The x86-64 arch has a 'rep stosb' instruction, which can perform
memset() using only a single instruction, given:
%al = value (just like the second argument of memset())
%rdi = destination
%rcx = length
Before this patch:
```
00000000000010c9 <memset>:
10c9: 48 89 f8 mov %rdi,%rax
10cc: 48 85 d2 test %rdx,%rdx
10cf: 74 0e je 10df <memset+0x16>
10d1: 31 c9 xor %ecx,%ecx
10d3: 40 88 34 08 mov %sil,(%rax,%rcx,1)
10d7: 48 ff c1 inc %rcx
10da: 48 39 ca cmp %rcx,%rdx
10dd: 75 f4 jne 10d3 <memset+0xa>
10df: c3 ret
```
After this patch:
```
0000000000001511 <memset>:
1511: 96 xchg %eax,%esi
1512: 48 89 d1 mov %rdx,%rcx
1515: 57 push %rdi
1516: f3 aa rep stos %al,%es:(%rdi)
1518: 58 pop %rax
1519: c3 ret
```
v2:
- Use pushq %rdi / popq %rax (Alviro).
- Use xchg %eax, %esi (Willy).
Link: https://lore.kernel.org/lkml/ZO9e6h2jjVIMpBJP@1wt.eu
Suggested-by: Alviro Iskandar Setiawan <alviro.iskandar@gnuweeb.org>
Suggested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ammar Faizi <ammarfaizi2@gnuweeb.org>
Reviewed-by: Alviro Iskandar Setiawan <alviro.iskandar@gnuweeb.org>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
219 lines
10 KiB
C
219 lines
10 KiB
C
/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* x86_64 specific definitions for NOLIBC
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* Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
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*/
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#ifndef _NOLIBC_ARCH_X86_64_H
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#define _NOLIBC_ARCH_X86_64_H
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#include "compiler.h"
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#include "crt.h"
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/* Syscalls for x86_64 :
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* - registers are 64-bit
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* - syscall number is passed in rax
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* - arguments are in rdi, rsi, rdx, r10, r8, r9 respectively
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* - the system call is performed by calling the syscall instruction
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* - syscall return comes in rax
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* - rcx and r11 are clobbered, others are preserved.
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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* - the syscall number is always specified last in order to allow to force
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* some registers before (gcc refuses a %-register at the last position).
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* - see also x86-64 ABI section A.2 AMD64 Linux Kernel Conventions, A.2.1
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* Calling Conventions.
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*
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* Link x86-64 ABI: https://gitlab.com/x86-psABIs/x86-64-ABI/-/wikis/home
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*
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*/
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#define my_syscall0(num) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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register long _arg1 __asm__ ("rdi") = (long)(arg1); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "r"(_arg1), \
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"0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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register long _arg1 __asm__ ("rdi") = (long)(arg1); \
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register long _arg2 __asm__ ("rsi") = (long)(arg2); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "r"(_arg1), "r"(_arg2), \
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"0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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register long _arg1 __asm__ ("rdi") = (long)(arg1); \
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register long _arg2 __asm__ ("rsi") = (long)(arg2); \
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register long _arg3 __asm__ ("rdx") = (long)(arg3); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), \
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"0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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register long _arg1 __asm__ ("rdi") = (long)(arg1); \
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register long _arg2 __asm__ ("rsi") = (long)(arg2); \
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register long _arg3 __asm__ ("rdx") = (long)(arg3); \
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register long _arg4 __asm__ ("r10") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \
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"0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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register long _arg1 __asm__ ("rdi") = (long)(arg1); \
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register long _arg2 __asm__ ("rsi") = (long)(arg2); \
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register long _arg3 __asm__ ("rdx") = (long)(arg3); \
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register long _arg4 __asm__ ("r10") = (long)(arg4); \
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register long _arg5 __asm__ ("r8") = (long)(arg5); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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#define my_syscall6(num, arg1, arg2, arg3, arg4, arg5, arg6) \
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({ \
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long _ret; \
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register long _num __asm__ ("rax") = (num); \
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register long _arg1 __asm__ ("rdi") = (long)(arg1); \
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register long _arg2 __asm__ ("rsi") = (long)(arg2); \
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register long _arg3 __asm__ ("rdx") = (long)(arg3); \
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register long _arg4 __asm__ ("r10") = (long)(arg4); \
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register long _arg5 __asm__ ("r8") = (long)(arg5); \
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register long _arg6 __asm__ ("r9") = (long)(arg6); \
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\
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__asm__ volatile ( \
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"syscall\n" \
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: "=a"(_ret) \
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: "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_arg6), "0"(_num) \
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: "rcx", "r11", "memory", "cc" \
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); \
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_ret; \
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})
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/* startup code */
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/*
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* x86-64 System V ABI mandates:
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* 1) %rsp must be 16-byte aligned right before the function call.
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* 2) The deepest stack frame should be zero (the %rbp).
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*
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*/
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void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector _start(void)
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{
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__asm__ volatile (
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"xor %ebp, %ebp\n" /* zero the stack frame */
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"mov %rsp, %rdi\n" /* save stack pointer to %rdi, as arg1 of _start_c */
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"and $-16, %rsp\n" /* %rsp must be 16-byte aligned before call */
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"call _start_c\n" /* transfer to c runtime */
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"hlt\n" /* ensure it does not return */
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);
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__builtin_unreachable();
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}
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#define NOLIBC_ARCH_HAS_MEMMOVE
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void *memmove(void *dst, const void *src, size_t len);
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#define NOLIBC_ARCH_HAS_MEMCPY
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void *memcpy(void *dst, const void *src, size_t len);
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#define NOLIBC_ARCH_HAS_MEMSET
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void *memset(void *dst, int c, size_t len);
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__asm__ (
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".section .text.nolibc_memmove_memcpy\n"
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".weak memmove\n"
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".weak memcpy\n"
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"memmove:\n"
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"memcpy:\n"
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"movq %rdx, %rcx\n\t"
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"movq %rdi, %rax\n\t"
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"movq %rdi, %rdx\n\t"
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"subq %rsi, %rdx\n\t"
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"cmpq %rcx, %rdx\n\t"
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"jb .Lbackward_copy\n\t"
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"rep movsb\n\t"
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"retq\n"
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".Lbackward_copy:"
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"leaq -1(%rdi, %rcx, 1), %rdi\n\t"
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"leaq -1(%rsi, %rcx, 1), %rsi\n\t"
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"std\n\t"
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"rep movsb\n\t"
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"cld\n\t"
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"retq\n"
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".section .text.nolibc_memset\n"
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".weak memset\n"
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"memset:\n"
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"xchgl %eax, %esi\n\t"
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"movq %rdx, %rcx\n\t"
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"pushq %rdi\n\t"
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"rep stosb\n\t"
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"popq %rax\n\t"
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"retq\n"
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);
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#endif /* _NOLIBC_ARCH_X86_64_H */
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