mirror of
https://github.com/torvalds/linux
synced 2024-09-28 23:41:21 +00:00
92ab78315c
[
mingo@elte.hu: these fixes are a subset of changes cherry-picked from:
git://git.kernel.org:/pub/scm/linux/kernel/git/jejb/voyager-2.6.git
They fix various problems that recent x86 changes caused in the Voyager
subarchitecture: both APIC changes and cpumask changes and certain
cleanups caused subarch assumptions to break.
Most of these changes are obsolete as the subarch code has been removed
from the x86 development tree - but we merge them upstream to make Voyager
build and boot.
]
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
119 lines
2.5 KiB
C
119 lines
2.5 KiB
C
/*
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* Machine specific setup for generic
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/arch_hooks.h>
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#include <asm/voyager.h>
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#include <asm/e820.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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void __init pre_intr_init_hook(void)
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{
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init_ISA_irqs();
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}
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = {
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.handler = no_action,
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.mask = CPU_MASK_NONE,
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.name = "cascade",
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};
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void __init intr_init_hook(void)
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{
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#ifdef CONFIG_SMP
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voyager_smp_intr_init();
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#endif
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setup_irq(2, &irq2);
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}
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static void voyager_disable_tsc(void)
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{
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/* Voyagers run their CPUs from independent clocks, so disable
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* the TSC code because we can't sync them */
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setup_clear_cpu_cap(X86_FEATURE_TSC);
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}
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void __init pre_setup_arch_hook(void)
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{
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voyager_disable_tsc();
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}
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void __init pre_time_init_hook(void)
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{
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voyager_disable_tsc();
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}
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void __init trap_init_hook(void)
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{
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
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.mask = CPU_MASK_NONE,
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.name = "timer"
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};
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void __init time_init_hook(void)
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{
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irq0.mask = cpumask_of_cpu(safe_smp_processor_id());
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setup_irq(0, &irq0);
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}
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/* Hook for machine specific memory setup. */
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char *__init machine_specific_memory_setup(void)
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{
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char *who;
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int new_nr;
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who = "NOT VOYAGER";
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if (voyager_level == 5) {
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__u32 addr, length;
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int i;
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who = "Voyager-SUS";
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e820.nr_map = 0;
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for (i = 0; voyager_memory_detect(i, &addr, &length); i++) {
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e820_add_region(addr, length, E820_RAM);
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}
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return who;
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} else if (voyager_level == 4) {
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__u32 tom;
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__u16 catbase = inb(VOYAGER_SSPB_RELOCATION_PORT) << 8;
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/* select the DINO config space */
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outb(VOYAGER_DINO, VOYAGER_CAT_CONFIG_PORT);
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/* Read DINO top of memory register */
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tom = ((inb(catbase + 0x4) & 0xf0) << 16)
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+ ((inb(catbase + 0x5) & 0x7f) << 24);
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if (inb(catbase) != VOYAGER_DINO) {
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printk(KERN_ERR
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"Voyager: Failed to get DINO for L4, setting tom to EXT_MEM_K\n");
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tom = (boot_params.screen_info.ext_mem_k) << 10;
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}
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who = "Voyager-TOM";
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e820_add_region(0, 0x9f000, E820_RAM);
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/* map from 1M to top of memory */
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e820_add_region(1 * 1024 * 1024, tom - 1 * 1024 * 1024,
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E820_RAM);
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/* FIXME: Should check the ASICs to see if I need to
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* take out the 8M window. Just do it at the moment
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* */
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e820_add_region(8 * 1024 * 1024, 8 * 1024 * 1024,
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E820_RESERVED);
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return who;
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}
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return default_machine_specific_memory_setup();
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}
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