linux/include/pcmcia
Arnd Bergmann 645b302673 ARM: pxa/sa1100: move I/O space to PCI_IOBASE
PXA and StrongARM1100 traditionally map their I/O space 1:1 into virtual
memory, using a per-bus io_offset that matches the base address of the
ioremap mapping.

In order for PXA to work in a multiplatform config, this needs to
change so I/O space starts at PCI_IOBASE (0xfee00000). Since the pcmcia
soc_common support is shared with StrongARM1100, both have to change at
the same time. The affected machines are:

 - Anything with a PCMCIA slot now uses pci_remap_iospace, which
   is made available to PCMCIA configurations as well, rather than
   just PCI. The first PCMCIA slot now starts at port number 0x10000.

 - The Zeus and Viper platforms have PC/104-style ISA buses,
   which have a static mapping for both I/O and memory space at
   0xf1000000, which can no longer work. It does not appear to have
   any in-tree users, so moving it to port number 0 makes them
   behave like a traditional PC.

 - SA1100 does support ISA slots in theory, but all machines that
   originally enabled this appear to have been removed from the tree
   ages ago, and the I/O space is never mapped anywhere.

 - The Nanoengine machine has support for PCI slots, but looks
   like this never included I/O space, the resources only define the
   location for memory and config space.

With this, the definitions of __io() and IO_SPACE_LIMIT can be simplified,
as the only remaining cases are the generic PCI_IOBASE and the custom
inb()/outb() macros on RiscPC.  S3C24xx still has a custom inb()/outb()
in this here, but this is already removed in another branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-07 22:56:17 +02:00
..
ciscode.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
cisreg.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
cistpl.h pcmcia: Replace zero-length array with flexible-array 2020-05-18 10:28:31 +02:00
device_id.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
ds.h It's been a relatively busy cycle for docs: 2019-07-09 12:34:26 -07:00
soc_common.h ARM: pxa/sa1100: move I/O space to PCI_IOBASE 2022-05-07 22:56:17 +02:00
ss.h It's been a relatively busy cycle for docs: 2019-07-09 12:34:26 -07:00