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https://github.com/torvalds/linux
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ec0159503a
Adding new PCI ID to support AMD F16 M30h processor (Mullins). While at it, modify Kconfig and Doc files to reflect the support for newer processors Note: PCI ID for this processor will make it into pci_ids.h as part of this patch: http://marc.info/?l=linux-kernel&m=139291362126057&w=2 which should be pulled into 3.15 when merge window opens (It currently sits in 'for-next' branch of bp.git- https://git.kernel.org/cgit/linux/kernel/git/bp/bp.git/log/?h=for-next) Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
227 lines
6.7 KiB
C
227 lines
6.7 KiB
C
/*
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* k10temp.c - AMD Family 10h/11h/12h/14h/15h/16h processor hardware monitoring
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*
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* Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de>
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*
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*
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* This driver is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <asm/processor.h>
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MODULE_DESCRIPTION("AMD Family 10h+ CPU core temperature monitor");
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MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
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MODULE_LICENSE("GPL");
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static bool force;
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module_param(force, bool, 0444);
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MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
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/* CPUID function 0x80000001, ebx */
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#define CPUID_PKGTYPE_MASK 0xf0000000
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#define CPUID_PKGTYPE_F 0x00000000
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#define CPUID_PKGTYPE_AM2R2_AM3 0x10000000
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/* DRAM controller (PCI function 2) */
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#define REG_DCT0_CONFIG_HIGH 0x094
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#define DDR3_MODE 0x00000100
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/* miscellaneous (PCI function 3) */
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#define REG_HARDWARE_THERMAL_CONTROL 0x64
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#define HTC_ENABLE 0x00000001
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#define REG_REPORTED_TEMPERATURE 0xa4
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#define REG_NORTHBRIDGE_CAPABILITIES 0xe8
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#define NB_CAP_HTC 0x00000400
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static ssize_t show_temp(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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u32 regval;
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pci_read_config_dword(to_pci_dev(dev),
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REG_REPORTED_TEMPERATURE, ®val);
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return sprintf(buf, "%u\n", (regval >> 21) * 125);
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}
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static ssize_t show_temp_max(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sprintf(buf, "%d\n", 70 * 1000);
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}
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static ssize_t show_temp_crit(struct device *dev,
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struct device_attribute *devattr, char *buf)
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{
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struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
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int show_hyst = attr->index;
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u32 regval;
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int value;
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pci_read_config_dword(to_pci_dev(dev),
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REG_HARDWARE_THERMAL_CONTROL, ®val);
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value = ((regval >> 16) & 0x7f) * 500 + 52000;
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if (show_hyst)
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value -= ((regval >> 24) & 0xf) * 500;
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return sprintf(buf, "%d\n", value);
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}
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static ssize_t show_name(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sprintf(buf, "k10temp\n");
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}
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static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL);
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static DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL);
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static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
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static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1);
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static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
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static bool has_erratum_319(struct pci_dev *pdev)
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{
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u32 pkg_type, reg_dram_cfg;
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if (boot_cpu_data.x86 != 0x10)
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return false;
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/*
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* Erratum 319: The thermal sensor of Socket F/AM2+ processors
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* may be unreliable.
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*/
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pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK;
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if (pkg_type == CPUID_PKGTYPE_F)
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return true;
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if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3)
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return false;
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/* DDR3 memory implies socket AM3, which is good */
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pci_bus_read_config_dword(pdev->bus,
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PCI_DEVFN(PCI_SLOT(pdev->devfn), 2),
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REG_DCT0_CONFIG_HIGH, ®_dram_cfg);
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if (reg_dram_cfg & DDR3_MODE)
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return false;
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/*
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* Unfortunately it is possible to run a socket AM3 CPU with DDR2
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* memory. We blacklist all the cores which do exist in socket AM2+
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* format. It still isn't perfect, as RB-C2 cores exist in both AM2+
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* and AM3 formats, but that's the best we can do.
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*/
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return boot_cpu_data.x86_model < 4 ||
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(boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2);
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}
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static int k10temp_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct device *hwmon_dev;
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u32 reg_caps, reg_htc;
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int unreliable = has_erratum_319(pdev);
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int err;
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if (unreliable && !force) {
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dev_err(&pdev->dev,
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"unreliable CPU thermal sensor; monitoring disabled\n");
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err = -ENODEV;
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goto exit;
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}
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err = device_create_file(&pdev->dev, &dev_attr_temp1_input);
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if (err)
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goto exit;
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err = device_create_file(&pdev->dev, &dev_attr_temp1_max);
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if (err)
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goto exit_remove;
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pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, ®_caps);
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pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, ®_htc);
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if ((reg_caps & NB_CAP_HTC) && (reg_htc & HTC_ENABLE)) {
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err = device_create_file(&pdev->dev,
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&sensor_dev_attr_temp1_crit.dev_attr);
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if (err)
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goto exit_remove;
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err = device_create_file(&pdev->dev,
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&sensor_dev_attr_temp1_crit_hyst.dev_attr);
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if (err)
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goto exit_remove;
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}
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err = device_create_file(&pdev->dev, &dev_attr_name);
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if (err)
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goto exit_remove;
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hwmon_dev = hwmon_device_register(&pdev->dev);
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if (IS_ERR(hwmon_dev)) {
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err = PTR_ERR(hwmon_dev);
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goto exit_remove;
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}
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pci_set_drvdata(pdev, hwmon_dev);
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if (unreliable && force)
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dev_warn(&pdev->dev,
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"unreliable CPU thermal sensor; check erratum 319\n");
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return 0;
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exit_remove:
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device_remove_file(&pdev->dev, &dev_attr_name);
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device_remove_file(&pdev->dev, &dev_attr_temp1_input);
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device_remove_file(&pdev->dev, &dev_attr_temp1_max);
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device_remove_file(&pdev->dev,
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&sensor_dev_attr_temp1_crit.dev_attr);
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device_remove_file(&pdev->dev,
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&sensor_dev_attr_temp1_crit_hyst.dev_attr);
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exit:
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return err;
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}
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static void k10temp_remove(struct pci_dev *pdev)
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{
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hwmon_device_unregister(pci_get_drvdata(pdev));
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device_remove_file(&pdev->dev, &dev_attr_name);
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device_remove_file(&pdev->dev, &dev_attr_temp1_input);
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device_remove_file(&pdev->dev, &dev_attr_temp1_max);
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device_remove_file(&pdev->dev,
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&sensor_dev_attr_temp1_crit.dev_attr);
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device_remove_file(&pdev->dev,
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&sensor_dev_attr_temp1_crit_hyst.dev_attr);
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}
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static const struct pci_device_id k10temp_id_table[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) },
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{}
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};
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MODULE_DEVICE_TABLE(pci, k10temp_id_table);
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static struct pci_driver k10temp_driver = {
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.name = "k10temp",
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.id_table = k10temp_id_table,
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.probe = k10temp_probe,
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.remove = k10temp_remove,
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};
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module_pci_driver(k10temp_driver);
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