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linux/drivers/net/ethernet/chelsio
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Hariprasad Shenai 9bb59b96ae cxgb4: Fix T5 adapter accessing T4 adapter registers 
Fixes few register access for both T4 and T5.
PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS & PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS
is T4 only register don't let T5 access them. For T5 MA_PARITY_ERROR_STATUS2
is additionally read. MPS_TRC_RSS_CONTROL is T4 only register, for T5 use
MPS_T5_TRC_RSS_CONTROL.

Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-09-01 23:00:41 -07:00
..
cxgb PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use 2014-08-12 12:15:14 -06:00
cxgb3 PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use 2014-08-12 12:15:14 -06:00
cxgb4 cxgb4: Fix T5 adapter accessing T4 adapter registers 2014-09-01 23:00:41 -07:00
cxgb4vf cxgb4: Free completed tx skbs promptly 2014-08-21 21:54:52 -07:00
Kconfig cxgb4 : Makefile & Kconfig changes for DCBx support 2014-06-22 21:13:33 -07:00
Makefile