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Current Intel SOC cores use a MailBox Interface (MBI) to provide access to unit devices connected to the system fabric. This driver implements access to this interface on BayTrail platforms. This is a requirement for drivers that need access to unit registers on the platform (e.g. accessing the PUNIT for power management features such as RAPL). Serialized access is handled by all exported routines with spinlocks. The API includes 3 functions for access to unit registers: int bt_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) int bt_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) int bt_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) port: indicating the unit being accessed opcode: the read or write port specific opcode offset: the register offset within the port mdr: the register data to be read, written, or modified mask: bit locations in mdr to change Returns nonzero on error Note: GPU code handles access to the GFX unit. Therefore access to that unit with this driver is disallowed to avoid conflicts. Signed-off-by: David E. Box <david.e.box@linux.intel.com> Signed-off-by: Matthew Garrett <matthew.garrett@nebula.com> |
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