Serge Semin 993d57bbaa dmaengine: dw-edma: Add CPU to PCI bus address translation ... Since 9575632052 ("dmaengine: make slave address physical"), the source and destination addresses of the DMA slave device have been converted to physical addresses in the CPU address space. It's the DMA device driver's responsibility to convert them to the DMA bus address space. In case of the DW eDMA device, the source or destination peripheral (slave) devices reside in PCI bus space. Thus we need to perform the PCI Host/Endpoint windows- based (i.e. DT "ranges" property) address translation; otherwise the eDMA transactions won't work as expected (or can be even harmful) if the CPU and PCI address spaces don't match. Note 1: Even though the DMA interleaved template has both source and destination addresses declared as dma_addr_t, only the CPU memory range should be mapped to be seen by the DMA device since it's a subject of the DMA getting towards the system side. The device part must not be mapped since the slave device resides in the PCI bus space, which isn't affected by IOMMUs or iATU translations. DW PCIe eDMA generates corresponding MWr/MRd TLPs on its own. Note 2: This functionality is mainly required for the remote eDMA setup since the CPU address must be manually translated into the PCI bus space before being written to LLI.{SAR,DAR}. If eDMA is embedded in the locally accessible DW PCIe Root Port/Endpoint, software-based translation isn't required since hardware will translate it via the Outbound iATU as long as the DMA_BYPASS flag is cleared. If DMA_BYPASS is set or there is no Outbound iATU entry that contains the SAR or DAR (for Read and Write channel respectively), there won't be any translation performed but DMA will proceed with the corresponding source/destination address as-is. Link: https://lore.kernel.org/r/20230113171409.30470-8-Sergey.Semin@baikalelectronics.ru Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org>		2023-01-27 17:15:33 +01:00
..
dw-edma-core.c	dmaengine: dw-edma: Add CPU to PCI bus address translation	2023-01-27 17:15:33 +01:00
dw-edma-core.h	dmaengine: dw-edma: Detach the private data and chip info structures	2022-06-23 14:49:30 -05:00
dw-edma-pcie.c	dmaengine: dw-edma: Convert ll/dt phys address to PCI bus/DMA address	2023-01-27 17:15:33 +01:00
dw-edma-v0-core.c	pci-v5.20-changes	2022-08-04 19:30:35 -07:00
dw-edma-v0-core.h	dmaengine: dw-edma: Detach the private data and chip info structures	2022-06-23 14:49:30 -05:00
dw-edma-v0-debugfs.c	dmaengine: dw-edma: Change rg_region to reg_base in struct dw_edma_chip	2022-06-23 14:56:34 -05:00
dw-edma-v0-debugfs.h	dmaengine: dw-edma: Detach the private data and chip info structures	2022-06-23 14:49:30 -05:00
dw-edma-v0-regs.h	dmaengine: dw-edma: Fix comments offset characters' alignment	2021-03-16 22:58:52 +05:30
Kconfig	dmaengine: dw-edma: Fix build error without CONFIG_PCI_MSI	2019-06-12 10:22:02 +05:30
Makefile	dmaengine: Add Synopsys eDMA IP PCIe glue-logic	2019-06-10 13:10:39 +05:30