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97f00f7120
The SSBI bus is exclusive to the Qualcomm MSM targets, and all SoCs using it will be using device tree. Convert this driver to indentify with device tree. This makes the bus probing a good bit simpler, since the attaching of child nodes can be represented directly in the devicetree, rather than having to be inferred by name. Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
48 lines
1 KiB
Plaintext
48 lines
1 KiB
Plaintext
/dts-v1/;
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/include/ "skeleton.dtsi"
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/ {
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model = "Qualcomm MSM8660 SURF";
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compatible = "qcom,msm8660-surf", "qcom,msm8660";
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interrupt-parent = <&intc>;
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intc: interrupt-controller@2080000 {
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compatible = "qcom,msm-8660-qgic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = < 0x02080000 0x1000 >,
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< 0x02081000 0x1000 >;
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};
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timer@2000004 {
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compatible = "qcom,msm-gpt", "qcom,msm-timer";
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interrupts = <1 1 0x301>;
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reg = <0x02000004 0x10>;
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clock-frequency = <32768>;
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cpu-offset = <0x40000>;
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};
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timer@2000024 {
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compatible = "qcom,msm-dgt", "qcom,msm-timer";
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interrupts = <1 0 0x301>;
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reg = <0x02000024 0x10>,
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<0x02000034 0x4>;
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clock-frequency = <6750000>;
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cpu-offset = <0x40000>;
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};
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serial@19c400000 {
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compatible = "qcom,msm-hsuart", "qcom,msm-uart";
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reg = <0x19c40000 0x1000>,
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<0x19c00000 0x1000>;
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interrupts = <0 195 0x0>;
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};
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qcom,ssbi@500000 {
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compatible = "qcom,ssbi";
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reg = <0x500000 0x1000>;
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qcom,controller-type = "pmic-arbiter";
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};
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};
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