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HNS3(HiSilicon Network System 3) PMU is RCiEP device in HiSilicon SoC NIC, supports collection of performance statistics such as bandwidth, latency, packet rate and interrupt rate. NIC of each SICL has one PMU device for it. Driver registers each PMU device to perf, and exports information of supported events, filter mode of each event, bdf range, hardware clock frequency, identifier and so on via sysfs. Each PMU device has its own registers of control, counters and interrupt, and it supports 8 hardware events, each hardward event has its own registers for configuration, counters and interrupt. Filter options contains: config - select event port - select physical port of nic tc - select tc(must be used with port) func - select PF/VF queue - select queue of PF/VF(must be used with func) intr - select interrupt number(must be used with func) global - select all functions of IO DIE Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Reviewed-by: Shaokun Zhang <zhangshaokun@hisilicon.com> Link: https://lore.kernel.org/r/20220628063419.38514-3-huangguangbin2@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
27 lines
799 B
Plaintext
27 lines
799 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config HISI_PMU
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tristate "HiSilicon SoC PMU drivers"
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depends on ARM64 && ACPI
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help
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Support for HiSilicon SoC L3 Cache performance monitor, Hydra Home
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Agent performance monitor and DDR Controller performance monitor.
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config HISI_PCIE_PMU
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tristate "HiSilicon PCIE PERF PMU"
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depends on PCI && ARM64
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help
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Provide support for HiSilicon PCIe performance monitoring unit (PMU)
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RCiEP devices.
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Adds the PCIe PMU into perf events system for monitoring latency,
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bandwidth etc.
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config HNS3_PMU
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tristate "HNS3 PERF PMU"
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depends on ARM64 || COMPILE_TEST
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depends on PCI
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help
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Provide support for HNS3 performance monitoring unit (PMU) RCiEP
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devices.
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Adds the HNS3 PMU into perf events system for monitoring latency,
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bandwidth etc.
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